Fast, Voltage-Out DC–440 MHz,

95 dB Logarithmic Amplifier

AD8310

Rev. D

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However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

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registered trademarks are the property of their respective owners.

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Tel: 781.329.4700

www.analog.com

FEATURES

Multistage demodulating logarithmic amplifier

Voltage output, rise time <15 ns

High current capacity: 25 mA into grounded RL

95 dB dynamic range: −91 dBV to +4 dBV

Single supply of 2.7 V min at 8 mA typ

DC–440 MHz operation, ±0.4 dB linearity

Slope of +24 mV/dB, intercept of −108 dBV

Highly stable scaling over temperature

Fully differential dc-coupled signal path

100 ns power-up time, 1 mA sleep current

APPLICATIONS

Conversion of signal level to decibel form

Transmitter antenna power measurement

Receiver signal strength indication (RSSI)

Low cost radar and sonar signal processing

Network and spectrum analyzers

Signal-level determination down to 20 Hz

True-decibel ac mode for multimeters

GENERAL DESCRIPTION

The AD8310 is a complete, dc–440 MHz demodulating

logarithmic amplifier (log amp) with a very fast voltage mode

output, capable of driving up to 25 mA into a grounded load in

under 15 ns. It uses the progressive compression (successive

detection) technique to provide a dynamic range of up to 95 dB

to ±3 dB law conformance or 90 dB to a ±1 dB error bound up

to 100 MHz. It is extremely stable and easy to use, requiring no

significant external components. A single-supply voltage of

2.7 V to 5.5 V at 8 mA is needed, corresponding to a power

consumption of only 24 mW at 3 V. A fast-acting CMOS-

compatible enable pin is provided.

Each of the six cascaded amplifier/limiter cells has a small-

signal gain of 14.3 dB, with a −3 dB bandwidth of 900 MHz.

A total of nine detector cells are used to provide a dynamic

range that extends from −91 dBV (where 0 dBV is defined as

the amplitude of a 1 V rms sine wave), an amplitude of about

±40 µV, up to +4 dBV (or ±2.2 V). The demodulated output

is accurately scaled, with a log slope of 24 mV/dB and an

intercept of –108 dBV. The scaling parameters are supply-

and temperature-independent.

FUNCTIONAL BLOCK DIAGRAM

–

VPOS

INHI

INLO

COMM

8mA

1.0kΩ

BAND GAP REFERENCE

AND BIASING

SIX 14.3dB 900MHz

AMPLIFIER STAGES

NINE DETECTOR CELLS

SPACED 14.3dB

INPUT-OFFSET

COMPENSATION LOOP

2µA

MIRROR

3kΩ

1kΩ

COMM

ENBL

BFIN

VOUT

OFLT

ENABLE

BUFFER

INPUT

OUTPUT

OFFSET

FILTER

AD8310

SUPPLY

+INPUT

–INPUT

COMMON

33pF

01084-001

Figure 1.

The fully differential input offers a moderately high impedance

(1 kΩ in parallel with about 1 pF). A simple network can match

the input to 50 Ω and provide a power sensitivity of −78 dBm to

+17 dBm. The logarithmic linearity is typically within ±0.4 dB

up to 100 MHz over the central portion of the range, but it is

somewhat greater at 440 MHz. There is no minimum frequency

limit; the AD8310 can be used down to low audio frequencies.

Special filtering features are provided to support this wide

range.

The output voltage runs from a noise-limited lower boundary

of 400 mV to an upper limit within 200 mV of the supply

voltage for light loads. The slope and intercept can be readily

altered using external resistors. The output is tolerant of a wide

variety of load conditions and is stable with capacitive loads of

100 pF.

The AD8310 provides a unique combination of low cost, small

size, low power consumption, high accuracy and stability, high

dynamic range, a frequency range encompassing audio to UHF,

fast response time, and good load-driving capabilities, making

this product useful in numerous applications that require the

reduction of a signal to its decibel equivalent.

The AD8310 is available in the industrial temperature range of

–40°C to +85°C in an 8-lead MSOP package.

AD8310

Rev. D | Page 2 of 24

TABLE OF CONTENTS

Specifications..................................................................................... 3

Absolute Maximum Ratings............................................................ 4

ESD Caution.................................................................................. 4

Pin Configuration and Function Descriptions............................. 5

Typical Performance Characteristics ............................................. 6

Theory of Operation ........................................................................ 9

Progressive Compression ............................................................ 9

Slope and Intercept Calibration................................................ 10

Offset Control.............................................................................10

Product Overview........................................................................... 11

Enable Interface .......................................................................... 11

Input Interface............................................................................. 11

Offset Interface ........................................................................... 12

Output Interface ......................................................................... 12

Using the AD8310........................................................................... 14

Basic Connections...................................................................... 14

Transfer Function in Terms of Slope and Intercept............... 15

dBV vs. dBm................................................................................ 15

Input Matching ........................................................................... 15

Narrow-Band Matching ............................................................ 16

General Matching Procedure.................................................... 16

Slope and Intercept Adjustments ............................................. 17

Increasing the Slope to a Fixed Value ...................................... 17

Output Filtering.......................................................................... 18

Lowering the High-Pass Corner Frequency of the Offset

Compensation Loop

.................................................................. 18

Applications..................................................................................... 19

Cable-Driving ............................................................................. 19

DC-Coupled Input..................................................................... 19

Evaluation Board ............................................................................ 20

Outline Dimensions....................................................................... 22

Ordering Guide .......................................................................... 22

REVISION HISTORY

10/04—Data Sheet Changed from Rev. C to Rev. D

Format Updated.......................................................... Universal

Typical Performance Characteristics Reordered ......................... 6

Changes to Figures 41 and 42....................................................... 20

7/03—Data Sheet Changed from Rev. B to Rev. C

Replaced TPC 12............................................................................... 5

Change to DC-Coupled Input Section ........................................ 14

Replaced Figure 20 ......................................................................... 15

Updated Outline Dimensions....................................................... 16

2/03—Data Sheet Changed from Rev. A to Rev. B

Change to Evaluation Board Section ........................................... 15

Change to Table III......................................................................... 16

Updated Outline Dimensions....................................................... 16

1/00—Data Sheet Changed from Rev. 0 to Rev. A

10/99—Revision 0: Initial Version

AD8310

Rev. D | Page 3 of 24

SPECIFICATIONS

= 25°C, V

= 5 V, unless otherwise noted.

Table 1.

Parameter Conditions Min Typ Max Unit

INPUT STAGE Inputs INHI, INLO

Maximum Input

Single-ended, p-p ±2.0 ±2.2 V

4 dBV

Equivalent Power in 50 Ω Termination resistor of 52.3 Ω 17 dBm

Differential drive, p-p 20 dBm

Noise Floor Terminated 50 Ω source 1.28 nV/√Hz

Equivalent Power in 50 Ω 440 MHz bandwidth −78 dBm

Input Resistance From INHI to INLO 800 1000 1200 Ω

Input Capacitance From INHI to INLO 1.4 pF

DC Bias Voltage Either input 3.2 V

LOGARITHMIC AMPLIFIER Output VOUT

±3 dB Error Dynamic Range From noise floor to maximum input 95 dB

Transfer Slope 10 MHz ≤ f ≤ 200 MHz 22 24 26 mV/dB

Overtemperature, –40°C < T

< +85°C 20 26 mV/dB

Intercept (Log Offset)

10 MHz ≤ f ≤ 200 MHz −115 −108 −99 dBV

Equivalent dBm (re 50 Ω) −102 −95 −86 dBm

Overtemperature, −40°C ≤ T

≤ +85°C −120 −96 dBV

Equivalent dBm (re 50 Ω) −107 −83 dBm

Temperature sensitivity −0.04 dB/°C

Linearity Error (Ripple) Input from –88 dBV (–75 dBm) to +2 dBV (+15 dBm) ±0.4 dB

Output Voltage Input = –91 dBV (–78 dBm) 0.4 V

Input = 9 dBV (22 dBm) 2.6 V

Minimum Load Resistance, RL 100 Ω

Maximum Sink Current 0.5 mA

Output Resistance 0.05 Ω

Video Bandwidth 25 MHz

Rise Time (10% to 90%) Input Level = −43 dBV (−30 dBm), RL ≥ 402 Ω, CL ≤ 68 pF 15 ns

Input Level = −3 dBV (+10 dBm), RL ≥ 402 Ω, CL ≤ 68 pF 20 ns

Fall Time (90% to 10%) Input Level = −43 dBV (−30 dBm), RL ≥ 402 Ω, CL ≤ 68 pF 30 ns

Input Level = −3 dBV (+10 dBm), RL ≥ 402 Ω, CL ≤ 68 pF 40 ns

Output Settling Time to 1% Input Level = −13 dBV (0 dBm), RL ≥ 402 Ω, CL ≤ 68 pF 40 ns

POWER INTERFACES

Supply Voltage, VPOS 2.7 5.5 V

Quiescent Current Zero-signal 6.5 8.0 9.5 mA

Overtemperature −40°C < T

< +85°C 5.5 8.5 10 mA

Disable Current 0.05 µA

Logic Level to Enable Power High condition, −40°C < T

< +85°C 2.3 V

Input Current when High 3 V at ENBL 35 µA

Logic Level to Disable Power Low condition, −40°C < T

< +85°C 0.8 V

The input level is specified in dBV, because logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of

1 V rms. A power level of 0 dBm (1 mW) in a 50 Ω termination corresponds to an input of 0.2236 V rms. Therefore, the relationship between dBV and dBm is a fixed

offset of 13 dBm in the special case of a 50 Ω termination.

Guaranteed but not tested; limits are specified at six sigma levels.

Part #	AD8310ARM
Description	SP AMP LOG AMP SGL R-R I/P 5.5V 8MSOP - Rail/Tube
Category	IC
Availability	Out of Stock
Qty	0

AD8310ARM

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