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74LS257N

Part # 74LS257N
Description
Category IC
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Technical Document


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5-427
FAST AND LS TTL DATA
QUAD 2-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
The LSTTL/MSI SN54/74LS257B and the SN54/74LS258B are Quad
2-Input Multiplexers with 3-state outputs. Four bits of data from two sources
can be selected using a Common Data Select input. The four outputs present
the selected data in true (non-inverted) form. The outputs may be switched to
a high impedance state with a HIGH on the common Output Enable (E
O
) In-
put, allowing the outputs to interface directly with bus oriented systems. It is
fabricated with the Schottky barrier diode process for high speed and is com-
pletely compatible with all Motorola TTL families.
Schottky Process For High Speed
Multiplexer Expansion By Tying Outputs Together
Non-Inverting 3-State Outputs
Input Clamp Diodes Limit High Speed Termination Effects
Special Circuitry Ensures Glitch Free Multiplexing
ESD > 3500 Volts
CONNECTION DIAGRAM DIP (TOP VIEW)
SN54/74LS257B
SN54/74LS258B
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
SN54/74LS257B
SN54/74LS258B
QUAD 2-INPUT MULTIPLEXER
WITH 3-STATE OUTPUTS
LOW POWER SCHOTTKY
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
16
1
D SUFFIX
SOIC
CASE 751B-03
5-428
FAST AND LS TTL DATA
SN54/74LS257B SN54/74LS258B
LOGIC DIAGRAMS
SN54/74LS257B
SN54/74LS258B
5-429
FAST AND LS TTL DATA
SN54/74LS257B SN54/74LS258B
FUNCTIONAL DESCRIPTION
The LS257B and LS258B are Quad 2-Input Multiplexers
with 3-state outputs. They select four bits of data from two
sources each under control of a Common Data Select Input.
When the Select Input is LOW, the I
0
inputs are selected and
when Select is HIGH, the I
1
inputs are selected. The data on
the selected inputs appears at the outputs in true (non-
inverted) form for the LS257B and in the inverted form for the
LS258B.
The LS257B and LS258B are the logic implementation of a
4-pole, 2-position switch where the position of the switch is
determined by the logic levels supplied to the Select Input. The
logic equations for the outputs are shown below:
LS257B
Z
a
= E
0
(I
1a
S + I
0a
S
) Z
b
= E
0
(I
1b
S + I
0b
S
)
Z
c
= E
0
(I
1c
S + I
0c
S
) Z
d
= E
0
(I
1d
S + I
0d
S
)
When the Output Enable Input (E
0
) is HIGH, the outputs are
forced to a high impedance “off” state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure that Output Enable signals
to 3-state devices whose outputs are tied together are
designed so there is no overlap.
LS258B
Z
a
= E
0
(I
1a
S + I
0a
S
) Z
b
= E
0
(I
1b
S + I
0b
S
)
Z
c
= E
0
(I
1c
S + I
0c
S
) Z
d
= E
0
(I
1d
S + I
0d
S
)
TRUTH TABLE
OUTPUT
ENABLE
SELECT
INPUT
DATA
INPUTS
OUTPUTS
LS257B
OUTPUTS
LS258B
E
O
S I
0
I
1
Z Z
H X X X (Z) (Z)
L H X L L H
L H X H H L
L L L X L H
L L H X H L
H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
(Z) = High Impedance (off)
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage 54
74
4.5
4.75
5.0
5.0
5.5
5.25
V
T
A
Operating Ambient Temperature Range 54
74
55
0
25
25
125
70
°C
I
OH
Output Current — High 54
74
1.0
2.6
mA
I
OL
Output Current — Low 54
74
12
24
mA
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