ProASIC3 DC and Switching Characteristics

2-8 v1.3

Table 2-11 • Summary of I/O Output Buffer Power (per pin) – Default I/O Software Settings

Applicable to Advanced I/O Banks

LOAD

(pF) V

CCI

(V)

Static Power

DC3

(mW)

Dynamic Power

AC10

(µW/MHz)

Single-Ended

3.3 V LVTTL /

3.3 V LVCMOS

35 3.3 – 468.67

2.5 V LVCMOS 35 2.5 – 267.48

1.8 V LVCMOS 35 1.8 – 149.46

1.5 V LVCMOS

(JESD8-11)

35 1.5 – 103.12

3.3 V PCI 10 3.3 – 201.02

3.3 V PCI-X 10 3.3 – 201.02

Differential

LVDS – 2.5 7.74 88.92

LVPECL – 3.3 19.54 166.52

Notes:

1. Dynamic power consumption is given for standard load and software default drive strength

and output slew.

2. P

DC3

is the static power (where applicable) measured on V

CCI

3. P

AC10

is the total dynamic power measured on V

and V

CCI

Table 2-12 • Summary of I/O Output Buffer Power (Per Pin) – Default I/O Software Settings

Applicable to Standard Plus I/O Banks

LOAD

(pF) V

CCI

(V)

Static Power

DC3

(mW)

Dynamic Power

AC10

(µW/MHz)

Single-Ended

3.3 V LVTTL /

3.3 V LVCMOS

35 3.3 – 452.67

2.5 V LVCMOS 35 2.5 – 258.32

1.8 V LVCMOS 35 1.8 – 133.59

1.5 V LVCMOS

(JESD8-11)

35 1.5 – 92.84

3.3 V PCI 10 3.3 – 184.92

3.3 V PCI-X 10 3.3 – 184.92

Notes:

1. Dynamic power consumption is given for standard load and software default drive strength

and output slew.

2. P

DC3

is the static power (where applicable) measured on VMV.

3. P

AC10

is the total dynamic power measured on V

and VMV.

ProASIC3 DC and Switching Characteristics

v1.3 2-9

Table 2-13 • Summary of I/O Output Buffer Power (Per Pin) – Default I/O Software Settings

Applicable to Standard I/O Banks

LOAD

(pF) V

CCI

(V)

Static Power

DC3

(mW)

Dynamic Power

AC10

(µW/MHz)

Single-Ended

3.3 V LVTTL /

3.3 V LVCMOS

35 3.3 – 431.08

2.5 V LVCMOS 35 2.5 – 247.36

1.8 V LVCMOS 35 1.8 – 128.46

1.5 V LVCMOS

(JESD8-11)

35 1.5 – 89.46

Notes:

1. Dynamic power consumption is given for standard load and software default drive strength

and output slew.

2. P

DC3

is the static power (where applicable) measured on V

CCI

3. P

AC10

is the total dynamic power measured on V

and V

CCI

ProASIC3 DC and Switching Characteristics

2-10 v1.3

Power Consumption of Various Internal Resources

Table 2-14 • Different Components Contributing to Dynamic Power Consumption in ProASIC3 Devices

Parameter Definition

Device Specific Dynamic Contributions

(µW/MHz)

A3P1000

A3P600

A3P400

A3P250

A3P125

A3P060

A3P030

A3P015

AC1

Clock contribution of a Global Rib 14.50 12.80 12.80 11.00 11.00 9.30 9.30 9.30

AC2

Clock contribution of a Global Spine 2.48 1.85 1.35 1.58 0.81 0.81 0.41 0.41

AC3

Clock contribution of a VersaTile row 0.81

AC4

Clock contribution of a VersaTile used as a

sequential module

0.12

AC5

First contribution of a VersaTile used as a

sequential module

0.07

AC6

Second contribution of a VersaTile used as a

sequential module

0.29

AC7

Contribution of a VersaTile used as a

combinatorial Module

0.29

AC8

Average contribution of a routing net 0.70

AC9

Contribution of an I/O input pin (standard

dependent)

See Table 2-8 on page 2-6 through

Table 2-10 on page 2-7.

AC10

Contribution of an I/O output pin (standard

dependent)

See Table 2-11 on page 2-8 through

Table 2-13 on page 2-9.

AC11

Average contribution of a RAM block during

a read operation

25.00

AC12

Average contribution of a RAM block during

a write operation

30.00

AC13

Dynamic contribution for PLL 2.60

Note: *For a different output load, drive strength, or slew rate, Actel recommends using the Actel Power

spreadsheet calculator or SmartPower tool in Libero

Integrated Design Environment (IDE) software.

Part #	A3P250-FGG144
Description	IC FPGA 97 I/O 144FBGA
Category	IC
Availability	Out of Stock
Qty	0

A3P250-FGG144

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Technical Document