ProASIC3 DC and Switching Characteristics
v1.3 2-107
Advance v0.5
(continued)
The "I/O Banks" section is new. This section explains the following types of I/Os:
Advanced
Standard+
Standard
Table 2-12 • Automotive ProASIC3 Bank Types Definition and Differences is
new. This table describes the standards listed above.
2-29
PCI-X 3.3 V was added to the Compatible Standards for 3.3 V in Table 2-
11 • VCCI Voltages and Compatible Standards
2-29
Table 2-13 • ProASIC3 I/O Features was updated. 2-30
The "Double Data Rate (DDR) Support" section was updated to include
information concerning implementation of the feature.
2-32
The "Electrostatic Discharge (ESD) Protection" section was updated to include
testing information.
2-35
Level 3 and 4 descriptions were updated in Table 2-43 • I/O Hot-Swap and 5 V
Input Tolerance Capabilities in ProASIC3 Devices.
2-64
The notes in Table 2-43 • I/O Hot-Swap and 5 V Input Tolerance Capabilities in
ProASIC3 Devices were updated.
2-64
The "Simultaneous Switching Outputs (SSOs) and Printed Circuit Board Layout"
section is new.
2-41
A footnote was added to Table 2-14 • Maximum I/O Frequency for Single-Ended
and Differential I/Os in All Banks in Automotive ProASIC3 Devices (maximum
drive strength and high slew selected).
2-30
Table 2-18 • Automotive ProASIC3 I/O Attributes vs. I/O Standard Applications 2-45
Table 2-50 • ProASIC3 Output Drive (OUT_DRIVE) for Standard I/O Bank Type
(A3P030 device)
2-83
Table 2-51 • ProASIC3 Output Drive for Standard+ I/O Bank Type was updated. 2-84
Table 2-54 • ProASIC3 Output Drive for Advanced I/O Bank Type was updated. 2-84
The "x" was updated in the "User I/O Naming Convention" section. 2-48
The "V
CC
Core Supply Voltage" pin description was updated. 2-50
The "VMVx I/O Supply Voltage (quiet)" pin description was updated to include
information concerning leaving the pin unconnected.
2-50
The "V
JTAG
JTAG Supply Voltage" pin description was updated. 2-50
The "V
PUMP
Programming Supply Voltage" pin description was updated to
include information on what happens when the pin is tied to ground.
2-50
The "I/O User Input/Output" pin description was updated to include information
on what happens when the pin is unused.
2-50
The "JTAG Pins" section was updated to include information on what happens
when the pin is unused.
2-51
The "Programming" section was updated to include information concerning
serialization.
2-53
The "JTAG 1532" section was updated to include SAMPLE/PRELOAD
information.
2-54
"DC and Switching Characteristics" chapter was updated with new information. 3-1
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