ProASIC3 DC and Switching Characteristics
2-76 v1.3
Timing Characteristics
VersaTile Specifications as a Sequential Module
The ProASIC3 library offers a wide variety of sequential cells, including flip-flops and latches. Each
has a data input and optional enable, clear, or preset. In this section, timing characteristics are
presented for a representative sample from the library. For more details, refer to the Fusion,
IGLOO/e, and ProASIC3/E Macro Library Guide.
Table 2-96 • Combinatorial Cell Propagation Delays
Commercial-Case Conditions: T
J
= 70°C, Worst-Case V
CC
= 1.425 V
Combinatorial Cell Equation Parameter –2 –1 Std. –F Units
INV Y = !A t
PD
0.40 0.46 0.54 0.65 ns
AND2 Y = A · B t
PD
0.47 0.54 0.63 0.76 ns
NAND2 Y = !(A · B) t
PD
0.47 0.54 0.63 0.76 ns
OR2 Y = A + B t
PD
0.49 0.55 0.65 0.78 ns
NOR2 Y = !(A + B) t
PD
0.49 0.55 0.65 0.78 ns
XOR2 Y = A ⊕ Bt
PD
0.74 0.84 0.99 1.19 ns
MAJ3 Y = MAJ(A, B, C) t
PD
0.70 0.79 0.93 1.12 ns
XOR3 Y = A
⊕ B ⊕ Ct
PD
0.87 1.00 1.17 1.41 ns
MUX2 Y = A !S + B S t
PD
0.51 0.58 0.68 0.81 ns
AND3 Y = A · B · C t
PD
0.56 0.64 0.75 0.90 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.
Figure 2-25 • Sample of Sequential Cells
DQ
DFN1
Data
CLK
Out
D
Q
DFN1C1
Data
CLK
Out
CLR
DQ
DFI1E1P1
Data
CLK
Out
En
PRE
D
Q
DFN1E1
Data
CLK
Out
En
