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A3P250-FGG144

Part # A3P250-FGG144
Description IC FPGA 97 I/O 144FBGA
Category IC
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1 + $15.25371



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

ProASIC3 DC and Switching Characteristics
2-50 v1.3
Table 2-64 • 1.8 V LVCMOS Low Slew
Commercial-Case Conditions: T
J
= 70°C, Worst-Case V
CC
= 1.425 V, Worst-Case V
CCI
= 1.7 V
Applicable to Standard Plus I/O Banks
Drive
Strength
Speed
Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
t
ZLS
t
ZHS
Units
2 mA –F 0.79 17.78 0.05 1.44 0.51 16.21 17.78 2.70 1.76 18.90 20.47 ns
Std. 0.66 14.80 0.04 1.20 0.43 13.49 14.80 2.25 1.46 15.73 17.04 ns
–1 0.56 12.59 0.04 1.02 0.36 11.48 12.59 1.91 1.25 13.38 14.49 ns
–2 0.49 11.05 0.03 0.90 0.32 10.08 11.05 1.68 1.09 11.75 12.72 ns
4 mA –F 0.79 11.89 0.05 1.44 0.51 11.69 11.89 3.19 3.00 14.38 14.58 ns
Std. 0.66 9.90 0.04 1.20 0.43 9.73 9.90 2.65 2.50 11.97 12.13 ns
–1 0.56 8.42 0.04 1.02 0.36 8.28 8.42 2.26 2.12 10.18 10.32 ns
–2 0.49 7.39 0.03 0.90 0.32 7.27 7.39 1.98 1.86 8.94 9.06 ns
6 mA –F 0.79 8.93 0.05 1.44 0.51 9.10 8.79 3.53 3.59 11.79 11.48 ns
Std. 0.66 7.44 0.04 1.20 0.43 7.58 7.32 2.94 2.99 9.81 9.56 ns
–1 0.56 6.33 0.04 1.02 0.36 6.44 6.23 2.50 2.54 8.35 8.13 ns
–2 0.49 5.55 0.03 0.90 0.32 5.66 5.47 2.19 2.23 7.33 7.14 ns
8 mA –F 0.79 8.93 0.05 1.44 0.51 9.10 8.79 3.53 3.59 11.79 11.48 ns
Std. 0.66 7.44 0.04 1.20 0.43 7.58 7.32 2.94 2.99 9.81 9.56 ns
–1 0.56 6.33 0.04 1.02 0.36 6.44 6.23 2.50 2.54 8.35 8.13 ns
–2 0.49 5.55 0.03 0.90 0.32 5.66 5.47 2.19 2.23 7.33 7.14 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.
Table 2-65 • 1.8 V LVCMOS High Slew
Commercial-Case Conditions: T
J
= 70°C, Worst-Case V
CC
= 1.425 V, Worst-Case V
CCI
= 3.0 V
Applicable to Standard I/O Banks
Drive
Strength
Speed
Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
Units
2 mA –F 0.79 13.47 0.05 1.44 0.51 10.25 13.47 2.39 1.45 ns
Std. 0.66 11.21 0.04 1.20 0.43 8.53 11.21 1.99 1.21 ns
–1 0.56 9.54 0.04 1.02 0.36 7.26 9.54 1.69 1.03 ns
–2 0.49 8.37 0.03 0.90 0.32 6.37 8.37 1.49 0.90 ns
4 mA –F 0.79 7.62 0.05 1.44 0.51 6.46 7.62 2.89 2.98 ns
Std. 0.66 6.34 0.04 1.20 0.43 5.38 6.34 2.41 2.48 ns
–1 0.56 5.40 0.04 1.02 0.36 4.58 5.40 2.05 2.11 ns
–2 0.49 4.74 0.03 0.90 0.32 4.02 4.74 1.80 1.85 ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.
ProASIC3 DC and Switching Characteristics
v1.3 2-51
1.5 V LVCMOS (JESD8-11)
Low-Voltage CMOS for 1.5 V is an extension of the LVCMOS standard (JESD8-5) used for general-
purpose 1.5 V applications. It uses a 1.5 V input buffer and a push-pull output buffer.
Table 2-66 • 1.8 V LVCMOS Low Slew
Commercial-Case Conditions: T
J
= 70°C, Worst-Case V
CC
= 1.425 V, Worst-Case V
CCI
= 3.0 V
Applicable to Standard I/O Banks
Drive
Strength
Speed
Grade t
DOUT
t
DP
t
DIN
t
PY
t
EOUT
t
ZL
t
ZH
t
LZ
t
HZ
Units
2 mA –F 0.79 18.03 0.05 1.44 0.51 15.80 18.03 2.40 2.40 ns
Std. 0.66 15.01 0.04 1.20 0.43 13.15 15.01 1.99 1.99 ns
–1 0.56 12.77 0.04 1.02 0.36 11.19 12.77 1.70 1.70 ns
–2 0.49 11.21 0.03 0.90 0.32 9.82 11.21 1.49 1.49 ns
4 mA –F 0.79 12.13 0.05 1.44 0.51 11.48 12.13 2.90 2.85 ns
Std. 0.66 10.10 0.04 1.20 0.43 9.55 10.10 2.41 2.37 ns
–1 0.56 8.59 0.04 1.02 0.36 8.13 8.59 2.05 2.02 ns
–2 0.49 7.54 0.03 0.90 0.32 7.13 7.54 1.80 1.77 ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.
Table 2-67 • Minimum and Maximum DC Input and Output Levels
Applicable to Advanced I/O Banks
1.5 V
LVCMOS V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
I
OSL
I
OSH
I
IL
I
IH
Drive
Strength Min., V Max., V Min., V Max., V Max., V Min., V mA mA Max., mA
1
Max., mA
1
µA
2
µA
2
2 mA –0.3 0.30 * V
CCI
0.7 * V
CCI
3.6 0.25 * V
CCI
0.75 * V
CCI
2 2 16 13 10 10
4 mA –0.3 0.30 * V
CCI
0.7 * V
CCI
3.6 0.25 * V
CCI
0.75 * V
CCI
4 4 33 25 10 10
6 mA –0.3 0.30 * V
CCI
0.7 * V
CCI
3.6 0.25 * V
CCI
0.75 * V
CCI
6 6 39 32 10 10
8 mA –0.3 0.30 * V
CCI
0.7 * V
CCI
3.6 0.25 * V
CCI
0.75 * V
CCI
8 8 55 66 10 10
12 mA –0.3 0.30 * V
CCI
0.7 * V
CCI
3.6 0.25 * V
CCI
0.75 * V
CCI
12 12 55 66 10 10
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
ProASIC3 DC and Switching Characteristics
2-52 v1.3
Table 2-68 • Minimum and Maximum DC Input and Output Levels
Applicable to Standard Plus I/O Banks
1.5 V
LVCMOS V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
I
OSL
I
OSH
I
IL
I
IH
Drive
Strength Min., V Max., V Min., V Max., V Max., V Min., V mA mA Max., mA
1
Max., mA
1
µA
2
µA
2
2 mA –0.3 0.30 * V
CCI
0.7 * V
CCI
3.6 0.25 * V
CCI
0.75 * V
CCI
22 0 0 1010
4 mA –0.3 0.30 * V
CCI
0.7 * V
CCI
3.6 0.25 * V
CCI
0.75 * V
CCI
4 4 0 0 10 10
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
Table 2-69 • Minimum and Maximum DC Input and Output Levels
Applicable to Standard I/O Banks
1.5 V
LVCMOS V
IL
V
IH
V
OL
V
OH
I
OL
I
OH
I
OSL
I
OSH
I
IL
I
IH
Drive
Strength Min., V Max., V Min., V Max., V Max., V Min., V mA mA
Max.,
mA
1
Max.,
mA
1
µA
2
µA
2
2 mA –0.3 0.30 * V
CCI
0.7 * V
CCI
3.6 0.25 * V
CCI
0.75 * V
CCI
2 2 13 16 10 10
Notes:
1. Currents are measured at high temperature (100°C junction temperature) and maximum voltage.
2. Currents are measured at 85°C junction temperature.
3. Software default selection highlighted in gray.
Figure 2-9 • AC Loading
Table 2-70 • AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V) Input HIGH (V) Measuring Point* (V) C
LOAD
(pF)
0 1.5 0.75 35
* Measuring point = V
trip.
See Table 2-22 on page 2-20 for a complete table of trip points.
Test Point
Test Point
Enable Path
Datapath
35 pF
R = 1 k
R to V
CCI
for t
LZ
/t
ZL
/t
ZLS
R to GND for t
HZ
/t
ZH
/t
ZHS
35 pF for t
ZH
/t
ZH
S/t
ZL
/t
ZLS
5 pF for t
HZ
/t
LZ
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