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A3P250-FGG144

Part # A3P250-FGG144
Description IC FPGA 97 I/O 144FBGA
Category IC
Availability Out of Stock
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1 + $15.25371



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

ProASIC3 DC and Switching Characteristics
v1.3 2-23
Detailed I/O DC Characteristics
Table 2-27 • Input Capacitance
Symbol Definition Conditions Min. Max. Units
C
IN
Input capacitance V
IN
= 0, f = 1.0 MHz 8 pF
C
INCLK
Input capacitance on the clock pin V
IN
= 0, f = 1.0 MHz 8 pF
Table 2-28 • I/O Output Buffer Maximum Resistances
1
Applicable to Advanced I/O Banks
Standard Drive Strength
R
PULL-DOWN
()
2
R
PULL-UP
()
3
3.3 V LVTTL / 3.3 V LVCMOS 2 mA 100 300
4 mA 100 300
6 mA 50 150
8 mA 50 150
12 mA 25 75
16 mA 17 50
24 mA 11 33
2.5 V LVCMOS 2 mA 100 200
4 mA 100 200
6 mA 50 100
8 mA 50 100
12 mA 25 50
16 mA 20 40
24 mA 11 22
1.8 V LVCMOS 2 mA 200 225
4 mA 100 112
6 mA 50 56
8 mA 50 56
12 mA 20 22
16 mA 20 22
1.5 V LVCMOS 2 mA 200 224
4 mA 100 112
6 mA 67 75
8 mA 33 37
12 mA 33 37
3.3 V PCI/PCI-X Per PCI/PCI-X specification 25 75
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer
resistance values depend on V
CCI
, drive strength selection, temperature, and process. For
board design considerations and detailed output buffer resistances, use the corresponding
IBIS models located on the Actel website at http://www.actel.com/download/ibis/default.aspx.
2. R
(PULL-DOWN-MAX)
= (V
OLspec
) / I
OLspec
3. R
(PULL-UP-MAX)
= (V
CCImax
– V
OHspec
) / I
OHspec
ProASIC3 DC and Switching Characteristics
2-24 v1.3
Table 2-29 • I/O Output Buffer Maximum Resistances
1
Applicable to Standard Plus I/O Banks
Standard Drive Strength
R
PULL-DOWN
()
2
R
PULL-UP
()
3
3.3 V LVTTL / 3.3 V LVCMOS 2 mA 100 300
4 mA 100 300
6 mA 50 150
8 mA 50 150
12 mA 25 75
16 mA 25 75
2.5 V LVCMOS 2 mA 100 200
4 mA 100 200
6 mA 50 100
8 mA 50 100
12 mA 25 50
1.8 V LVCMOS 2 mA 200 225
4 mA 100 112
6 mA 50 56
8 mA 50 56
1.5 V LVCMOS 2 mA 200 224
4 mA 100 112
3.3 V PCI/PCI-X Per PCI/PCI-X specification 25 75
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer
resistance values depend on V
CCI
, drive strength selection, temperature, and process. For
board design considerations and detailed output buffer resistances, use the corresponding
IBIS models located on the Actel website at http://www.actel.com/download/ibis/default.aspx.
2. R
(PULL-DOWN-MAX)
= (V
OLspec
) / I
OLspec
3. R
(PULL-UP-MAX)
= (V
CCImax
– V
OHspec
) / I
OHspec
ProASIC3 DC and Switching Characteristics
v1.3 2-25
Table 2-30 • I/O Output Buffer Maximum Resistances
1
Applicable to Standard I/O Banks
Standard Drive Strength
R
PULL-DOWN
()
2
R
PULL-UP
()
3
3.3 V LVTTL / 3.3 V LVCMOS 2 mA 100 300
4 mA 100 300
6 mA 50 150
8 mA 50 150
2.5 V LVCMOS 2 mA 100 200
4 mA 100 200
6 mA 50 100
8 mA 50 100
1.8 V LVCMOS 2 mA 200 225
4 mA 100 112
1.5 V LVCMOS 2 mA 200 224
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer
resistance values depend on V
CCI
, drive strength selection, temperature, and process. For
board design considerations and detailed output buffer resistances, use the corresponding
IBIS models located on the Actel website at http://www.actel.com/download/ibis/default.aspx.
2. R
(PULL-DOWN-MAX)
= (V
OLspec
) / I
OLspec
3. R
(PULL-UP-MAX)
= (V
CCImax
– V
OHspec
) / I
OHspec
Table 2-31 • I/O Weak Pull-Up/Pull-Down Resistances
Minimum and Maximum Weak Pull-Up/Pull-Down Resistance Values
V
CCI
R
(WEAK PULL-UP)
1
()
R
(WEAK PULL-DOWN)
2
()
Min. Max. Min. Max.
3.3 V 10 k 45 k 10 k 45 k
2.5 V 11 k 55 k 12 k 74 k
1.8 V 18 k 70 k 17 k 110 k
1.5 V 19 k 90 k 19 k 140 k
Notes:
1. R
(WEAK PULL-UP-MAX)
= (V
OLspec
) / I
(WEAK PULL-UP-MIN)
2. R
(WEAK PULL-UP-MAX)
= (V
CCImax
– V
OHspec
) / I
(WEAK PULL-UP-MIN)
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