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ADVFC32KN

Part # ADVFC32KN
Description VFC/FVC NON-SYNC 500KHZ 14PDIP N - Rail/Tube
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
a
Voltage-to-Frequency and
Frequency-to-Voltage Converter
ADVFC32
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
FEATURES
High Linearity
60.01% max at 10 kHz FS
60.05% max at 100 kHz FS
60.2% max at 500 kHz FS
Output TTL/CMOS Compatible
V/F or F/V Conversion
6 Decade Dynamic Range
Voltage or Current Input
Reliable Monolithic Construction
MIL-STD-883 Compliant Versions Available
PRODUCT DESCRIPTION
The industry standard ADVFC32 is a low cost monolithic
voltage-to-frequency (V/F) converter or frequency-to-voltage
(F/V) converter with good linearity (0.01% max error at
10 kHz) and operating frequency up to 0.5 MHz. In the V/F
configuration, positive or negative input voltages or currents can
be converted to a proportional frequency using only a few exter-
nal components. For F/V conversion, the same components are
used with a simple biasing network to accommodate a wide
range of input logic levels.
TTL or CMOS compatibility is achieved in the V/F operating
mode using an open collector frequency output. The pullup re-
sistor can be connected to voltages up to 30 volts, or to +15 V
or +5 V for conventional CMOS or TTL logic levels. This resis-
tor should be chosen to limit current through the open collector
output to 8 mA. A larger resistance can be used if driving a high
impedance load.
Input offset drift is only 3ppm of full scale per °C, and full-
scale calibration drift is held to a maximum of 100 ppm/°C
(ADVFC32BH) due to a low T.C. Zener diode.
The ADVFC32 is available in commercial, industrial, and ex-
tended temperature grades. The commercial grade is packaged
in a 14-pin plastic DIP while the two wider temperature range
parts are packaged in hermetically sealed TO-100 cans.
PRODUCT HIGHLIGHTS
1. The ADVFC32 uses a charge balancing circuit technique
(see Functional Block Diagram) which is well suited to high
accuracy voltage-to-frequency conversion. The full-scale
operating frequency is determined by only one precision re-
sistor and capacitor. The tolerance of other support compo-
nents (including the integration capacitor) is not critical.
Inexpensive ±20% resistors and capacitors can be used with-
out affecting linearity or temperature drift.
PIN CONFIGURATION
(TOP VIEW)
“N” Package
“H” Package – TO-100
NC = NO CONNECT
2. The ADVFC32 is easily configured to satisfy a wide range of
system requirements. Input voltage scaling is set by selecting
the input resistor which sets the input current to 0.25 mA at
the maximum input voltage.
3. The same components used for V/F conversion can also be
used for F/V conversion by adding a simple logic biasing net-
work and reconfiguring the ADVFC32.
4. The ADVFC32 is intended as a pin-for-pin replacement for
VFC32 devices from other manufacturers.
5. The ADVFC32 is available in versions compliant with MIL-
STD-883. Refer to the Analog Devices Military Products
Databook or current ADVFC32/883B data sheet for detailed
specifications.
REV. A
–2–
ADVFC32–SPECIFICATIONS
(typical @ +258C with V
S
= 615 V unless otherwise noted)
Specifications shown in boldface are tested on all production units at
final electrical test. Results from those tests are used to calculate
outgoing quality levels. All min and max specifications are guaranteed,
although only those shown in boldface are tested on all production units.
ADVFC32K ADVFC32B ADVFC32S
Model Min Typ Max Min Typ Max Min Typ Max Units
DYNAMIC PERFORMANCE
Full Scale Frequency Range 0 500 0 500 0 500 kHz
Nonlinearity
1
f
MAX
= 10 kHz –0.01 ±0.01 –0.01 +0.01 –0.01 +0.01 %
f
MAX
= 100 kHz –0.05 +0.05 –0.05 +0.05 –0.05 +0.05 %
f
MAX
= 0.5 MHz –0.20 ±0.05 +0.20 –0.20 ±0.05 +0.20 –0.20 ± 0.05 +0.20 %
Full-Scale Calibration Error
(Adjustable to Zero) ±5 ±5 ±5%
vs. Supply
(Full Scale Frequency = 100 kHz)
–0.015 +0.015 –0.015 +0.015 –0.015 +0.015
% of FSR%
vs. Temperature
(Full Scale Frequency = 10 kHz)
±75 –100 +100 +150 +150
ppm/°C
DYNAMIC RESPONSE
Maximum Settling Time for Full Scale
Step Input 1 Pulse of New Frequency Plus 1 µs 1 Pulse of New Frequency Plus 1 µs 1 Pulse of New Frequency Plus 1 µs
Overload Recovery Time 1 Pulse of New Frequency Plus 1 µs 1 Pulse of New Frequency Plus 1 µs 1 Pulse of New Frequency Plus 1 µs
ANALOG INPUT AMPLIFIER
(V/F Conversion)
Current Input Range 0 +0.25 0 +0.25 0 +0.25 mA
Voltage Input Range 0 –10 0 –10 0 –10 V
2
0.25 0.25 0.25 mA
× R
IN
3
× R
IN
3
× R
IN
3
Differential Impedance
300 kΩ||10 pF
2 MΩ||10 pF 300 kΩ||10 pF 2 MΩ||10 pF 300 kΩ||10 pF 2 MΩ||10 pF
Common-Mode Impedance 300 MΩ||3 pF 750 MΩ||3 pF 300 MΩ||3 pF 750 MΩ||10 pF 300 MΩ||3 pF 750 MΩ||10 pF
Input Bias Current
Noninverting Input 40 250 40 250 40 250 nA
Inverting Input –100 ±8 +100 –100 ±8 +100 –100 ±8 +100 nA
Input Offset Voltage
(Trimmable to Zero)
2, 3
444mV
vs. Temperature (T
MIN
to T
MAX
)30 30 30 µV/°C
Safe Input Voltage ±V
S
±V
S
±V
S
COMPARATOR (F/V Conversion)
Logic “0” Level –V
S
–0.6 –V
S
–0.6 –V
S
–0.6 V
Logic “1” Level +1 +V
S
+1 +V
S
+1 +V
S
V
Pulse Width Range
4
0.1 0.15/f
MAX
0.1 0.15/f
MAX
0.1
0.15/f
MAX
µs
Input Impedance 50 kΩ||10 pF 250 k 50 kΩ||10 pF 250 k 50 kΩ||10 pF 250 k
OPEN COLLECTOR OUTPUT
(V/F Conversion)
Output Voltage in Logic “0”
I
SINK
= 8 mA 0.4 0.4 0.4 V
Output Leakage Current in Logic “1”
111µA
Voltage Range 0 +30 0 +30 0 +30 V
Fall Times (Load = 500 pF and
I
SINK
= 5 mA) 400 400 400 ns
AMPLIFIER OUTPUT (F/V Conversion)
Voltage Range (0 mAI
O
7 mA) 0 +10 0 +10 0 +10 V
Source Current (0V
O
7 V) 10 10 10 mA
Capacitive Load (Without Oscillation) 100 100 100 pF
Closed Loop Output Impedance 1 1 1
POWER SUPPLY
Rated Voltage ±15 ±15 ±15 V
Voltage Range ± 9 ±18 ±9 ± 18 ±9 ±18 V
Quiescent Current 6 8 6 8 6 8 mA
TEMPERATURE RANGE
Specified Range 0 +70 –25 +85 –55 +125 °C
Operating Range –25 +85 –55 +125 –55 +125 °C
Storage –25 +85 –65 +150 –65 +150 °C
PACKAGE OPTIONS
Plastic DIP (N-14) ADVFC32KN
TO–100 (H-10A)
ADVFC32BH ADVFC32SH
NOTES
1
Nonlinearity defined as deviation from a straight line from zero to full scale, expressed as a percentage of full scale.
2
See Figure 3.
3
See Figure 1.
4
f
MAX
expressed in units of MHz.
Specifications subject to change without notice.
ADVFC32
REV. A
–3–
UNIPOLAR V/F, POSITIVE INPUT VOLTAGE
When operated as a V/F converter, the transformation from
voltage to frequency is based on a comparison of input signal
magnitude to the 1 mA internal current source.
A more complete understanding of the ADVFC32 requires a
close examination of the internal circuitry of this part. Consider
the operation of the ADVFC32 when connected as shown in
Figure 1. At the start of a cycle, a current proportional to the
Figure 1. Connection Diagram for V/F Conversion,
Positive Input Voltage
input voltage flows through R3 and R1 to charge integration
capacitor C2. As charge builds up on C2, the output voltage of
the input amplifier decreases. When the amplifier output volt-
age (Pin 13) crosses ground (see Figure 2 at time t
1
), the
comparator triggers a one shot whose time period is determined
Figure 2. Voltage-to-Frequency Conversion Waveforms
by capacitor C1. Specifically, the one shot time period (in nano-
seconds) is:
t
OS
(C
l
+ 44 pF) × 6.7 k
During this period, a current of (1 mA – I
IN
) flows out of the in-
tegration capacitor. The total amount of charge depleted during
one cycle is, therefore (1 mA – I
IN
) × t
OS
. This charge is replaced
during the remainder of the cycle to return the integrator to its
original voltage. Since the charge taken out of C2 is equal to the
charge that is put on C2 every cycle,
(1 mA – I
IN
)
×
t
OS
= I
IN
×
1
F
OUT
t
OS
or, rearranging terms,
F
OUT
=
I
IN
1mA × t
OS
The complete transfer equation can now be derived by substi-
tuting I
IN
= V
IN
/R
IN
and the equation relating C1 and t
OS
. The
final equation describing ADVFC32 operation is:
V
IIN
/ R
IN
1mA × C
1
+ 44 pF
()
×6.7k
Components should be selected to optimize performance over
the desired input voltage and output frequency range using the
equations listed below:
3.7 × 10
7
pF / sec
F
OUT FS
–44pF
C
2
=
10
–4
Farads / sec
F
OUT FS
1000pF minimum
()
R
IN
=
V
IN FS
0.25 mA
R
2
+V
LOGIC
8mA
Both R
IN
and C
1
should have very low temperature coefficients
as changes in their values will result in a proportionate change in
the V/F transfer function. Other component values and tem-
perature coefficients are not critical.
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADVFC32 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE
Part Gain Tempco Temp Range Package
Number
1
ppm/8C 8C Option
ADVFC32KN ±75 typ 0 to +70 14-Pin
Plastic DIP
ADVFC32BH ±100 max –25 to +85 TO-100
ADVFC32SH ±150 max –55 to +125 TO-100
NOTE
1
For details on grade and package offerings screened in accordance with
MIL-STD-883, refer to the Analog Devices Military Products Databook or current
ADVFC32/883B data sheet.
Table I. Suggested Values for C
1
, R
IN
and C
2
V
IN FS
F
OUT FS
C
1
R
IN
C
2
1 V 10 kHz 3650 pF 4.0 k 0.01 µF
10 V 10 kHz 3650 pF 40 k 0.01 µF
1 V 100 kHz 330 pF 4.0 k 1000 pF
10 V 100 kHz 330 pF 40 k 1000 pF
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