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ADS820E

Part # ADS820E
Description
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

10-Bit, 20MHz Sampling
ANALOG-TO-DIGITAL CONVERTER
FEATURES
NO MISSING CODES
INTERNAL REFERENCE
LOW DIFFERENTIAL LINEARITY ERROR:
0.2LSB
LOW POWER: 195mW
HIGH SNR: 60dB
WIDEBAND TRACK/HOLD: 65MHz
DESCRIPTION
The ADS820 is a low-power, monolithic 10-bit, 20MHz Ana-
log-to-Digital (A/D) converter utilizing a small geometry CMOS
process. This complete converter includes a 10-bit quantizer
with internal track-and-hold, reference, and a power down
feature. It operates from a single +5V power supply and can
be configured to accept either differential or single-ended
input signals.
The ADS820 employs digital error correction to provide excel-
lent Nyquist differential linearity performance for demanding
imaging applications. Its low distortion, high SNR, and high
oversampling capability give it the extra margin needed for
telecommunications and video applications.
This high performance converter is specified for AC and
DC-performance at a 20MHz sampling rate. The ADS820
is available in an SO-28 package.
APPLICATIONS
SET-TOP BOXES
CABLE MODEMS
VIDEO DIGITIZING
CCD IMAGING
Camcorders
Copiers
Scanners
Security Cameras
IF AND BASEBAND DIGITIZATION
ADS820
SBAS037B – DECEMBER 1995 – REVISED FEBRUARY 2005
www.ti.com
Copyright © 1995-2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Pipeline
A/D
Timing
Circuitry
Error
Correction
Logic
3-State
Outputs
T&H
10-Bit
Digital
Data
CLK
+1.25V
+3.25V
MSBI OE
IN
IN
REFT
CM
REFB
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
A
D
S
8
2
0
U
All trademarks are the property of their respective owners.
www.ti.com
ADS820
2
SBAS037B
SPECIFIED
PACKAGE TEMPERATURE PACKAGE ORDERING TRANSPORT
PRODUCT PACKAGE-LEAD DESIGNATOR RANGE MARKING NUMBER MEDIA, QUANTITY
ADS820 SO-8 DW 40°C to +85°C ADS820U ADS820U Rails, 28
"" " ""ADS820U/1K Tape and Reel, 1000
ADS820U
PARAMETER CONDITIONS TEMP MIN TYP MAX UNITS
ELECTRICAL CHARACTERISTICS
At T
A
= +25°C, V
S
= +5V, Sampling Rate = 20MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.
Resolution 10 Bits
Specified Temperature Range T
AMBIENT
40 +85 °C
ANALOG INPUT
Differential Full-Scale Input Range +1.25 +3.25 V
Common-Mode Voltage 2.25 V
Analog Input Bandwidth (3dB)
Small Signal 20dBFS
(1)
Input +25°C 400 MHz
Full Power 0dB Input +25°C 65 MHz
Input Impedance 1.25 || 4 M || pF
DIGITAL INPUT
Logic Family TTL/HCT Compatible CMOS
Convert Command Start Conversion Falling Edge
ACCURACY
(2)
f
S
= 2.5MHz
Gain Error +25°C ±0.6 ±1.5 %
Full ±1.0 ±2.5 %
Gain Tempco ±85 ppm/°C
Power-Supply Rejection of Gain +V
S
= ±5% +25°C 0.01 0.1 %FSR/%
Input Offset Error Full ±2.1 ±3.0 %
Power-Supply Rejection of Offset +V
S
= ±5% +25°C 0.02 0.1 %FSR/%
CONVERSION CHARACTERISTICS
Sample Rate 10k 20M Sample/s
Data Latency 6.5
Convert Cycle
DYNAMIC CHARACTERISTICS
Differential Linearity Error
f = 500kHz +25°C ±0.15 ±1.0 LSB
Full ±0.15 ±1.0 LSB
f = 10MHz +25°C ±0.2 ±1.0 LSB
Full ±0.2 ±1.0 LSB
No Missing Codes Full Tested
Integral Linearity Error at f = 500kHz Full ±0.5 ±2.0 LSB
Spurious-Free Dynamic Range (SFDR)
f = 500kHz (1dBFS input) +25°C 67 77 dBFS
Full 64 74 dBFS
f = 10MHz (1dBFS input) +25°C 59 63 dBFS
Full 57 62 dBFS
ABSOLUTE MAXIMUM RATINGS
(1)
+V
S
....................................................................................................... +6V
Analog Input ............................................................ 0V to (+V
S
+ 300mV)
Logic Input ............................................................... 0V to (+V
S
+ 300mV)
Case Temperature ......................................................................... +100°C
Junction Temperature .................................................................... +150°C
Storage Temperature .................................................................... +125°C
External Top Reference Voltage (REFT) ................................. +3.4V Max
External Bottom Reference Voltage (REFB) ............................ +1.1V Min
NOTES: (1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods may degrade
device reliability.
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Texas Instru-
ments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
(1)
NOTE: (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at
www.ti.com.
NOTE: (1) dBFS refers to dB below Full Scale. (2) Percentage accuracies are referred to the internal A/D Converter Full-Scale Range of 4Vp-p. (3) IMD is
referred to the larger of the two input signals. If referred to the peak envelope signal ( 0dB), the intermodulation products will be 7dB lower. (4) Based on
(SINAD 1.76)/6.02. (5) No rollover of bits.
www.ti.com
ADS820
3
SBAS037B
ADS820U, E
PARAMETER CONDITIONS TEMP MIN TYP MAX UNITS
ELECTRICAL CHARACTERISTICS (Cont.)
At T
A
= +25°C, V
S
= +5V, Sampling Rate = 20MHz, with a 50% duty cycle clock having a 2ns rise/fall time, unless otherwise noted.
NOTE: (1) dBFS refers to dB below Full Scale. (2) Percentage accuracies are referred to the internal A/D Converter Full-Scale Range of 4Vp-p. (3) IMD is
referred to the larger of the two input signals. If referred to the peak envelope signal ( 0dB), the intermodulation products will be 7dB lower. (4) Based on
(SINAD 1.76)/6.02. (5) No rollover of bits.
Signal-to-Noise Ratio (SNR)
f = 500kHz (1dBFS input) +25°C 58 60.5 dB
Full 56 60 dB
f = 10MHz (1dBFS input) +25°C58 60 dB
Full 56 60 dB
Signal-to-(Noise + Distortion) (SINAD)
f = 500kHz (1dBFS input) +25°C 58 60.5 dB
Full 55 60 dB
f = 10MHz (1dBFS input) +25°C56 58 dB
Full 54 57 dB
Differential Gain Error NTSC or PAL +25°C 0.5 %
Differential Phase Error NTSC or PAL +25°C 0.1 degrees
Effective Bits
(4)
f
IN
= 3.58MHz 9.5 Bits
Aperture Delay Time +25°C2 ns
Aperture Jitter +25°C 7 ps rms
Overvoltage Recovery Time
(5)
1.5x Full-Scale Input +25°C2 ns
OUTPUTS
Logic Family TTL/HCT Compatible CMOS
Logic Coding Logic Selectable SOB or BTC V
Logic Levels Logic LOW, C
L
= 15pF Full 0 0.4 V
Logic HIGH, C
L
= 15pF Full 2.5 +V
S
V
3-State Enable Time 20 40 ns
3-State Disable Time Full 2 10 ns
POWER-SUPPLY REQUIREMENTS
Supply Voltage: +V
S
Operating Full +4.75 +5 +5.25 V
Supply Current: +I
S
Operating +25°C3947mA
Operating Full 40 55 mA
Power Consumption Operating +25°C 195 235 mW
Operating Full 200 275 mW
Thermal Resistance,
θ
JA
SO-28 75 °C/W
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