AD9880

Rev. 0 | Page 49 of 64

COLOR SPACE CONVERSION

The default power up values for the color space con-

verter coefficients (R0x35 through R0x4C) are set for

ATSC RGB to YCbCr conversion. They are completely

programmable for other conversions.

0x34 1 Color space Converter Enable

This bit enables the color space converter. The power-

up default setting is 0.

Table 74. Color space Converter

Select Result

0 Disable color space converter

1 Enable color space converter

0x35 6-5 Color space Converter Mode

These two bits set the fixed point position of the CSC

coefficients, including the A4, B4, and C4 offsets.

Table 75. CSC Fixed Point Converter Mode

Select Result

00 ±1.0, −4096 to 4095

01 ±2.0, −8192 to 8190

1× ±4.0, −16384 to 16380

0x35 4-0 Color space Conversion Coefficient A1 MSBs

These 5 bits form the 5 MSBs of the Color space

Conversion Coefficient A1. This combined with the

8 LSBs of the following register form a 13-bit twos

complement coefficient which is user programmable.

The equation takes the form of:

OUT

= (A1 × R

) + (A2 × G

) + (A3 × B

) + A4

OUT

= (B1 × R

) + (B2 × G

) + (B3 × B

) + B4

OUT

= (C1 × R

) + (C2 × G

) + (C3 × B

) + C4

The default value for the 13 bit A1 coefficient is

0x0C52.

0x36 7-0 Color space Conversion Coefficient A1 LSBs

See the Register 0x35 section.

0x37 4-0 CSC A2 MSBs

These five bits form the 5 MSBs of the Color space

Conversion Coefficient A2. Combined with the 8

LSBs of the following register they form a 13 bit twos

complement coefficient that is user programmable.

The equation takes the form of:

OUT

= (A1 × R

) + (A2 × G

) + (A3 × B

) + A4

OUT

= (B1 × R

) + (B2 × G

) + (B3 × B

) + B4

OUT

= (C1 × R

) + (C2 × G

) + (C3 × B

) + C4

The default value for the 13-bit A2 coefficient is

0x0800.

0x38 7-0 CSC A2 LSBs

See the Register 0x37 section.

0x39 4-0 CSC A3 MSBs

The default value for the 13-bit A3 is 0x0000.

0x3A 7-0 CSC A3 LSBs

0x3B 4-0 CSC A4 MSBs

The default value for the 13-bit A4 is 0x19D7.

0x3C 7-0 CSC A4 LSBs

0x3D 4-0 CSC B1 MSBs

The default value for the 13-bit B1 is 0x1C54.

0x3E 7-0 CSC B1 LSBs

0x3F 4-0 CSC B2 MSB

The default value for the 13-bit B2 is 0x0800.

0x40 7-0 CSC B2 LSBs

0x41 4-0 CSC B3 MSBs

The default value for the 13-bit B3 is 0x1E89.

0x42 7-0 CSC B3 LSBs

0x43 4-0 CSC B4 MSBs

The default value for the 13-bit B4 is 0x0291.

0x44 7-0 CSC B4 LSBs

0x45 4-0 CSC C1 MSBs

The default value for the 13-bit C1 is 0x0000.

0x46 7-0 CSC C1 LSBs

0x47 4-0 CSC C2 MSBs

The default value for the 13 bit C2 is 0x0800.

0x48 7-0 CSC C2 LSBs

0x49 4-0 CSC C3 MSBs

The default value for the 13-bit C3 is 0x0E87.

0x4A 7-0 CSC C3 LSBs

0x4B 4-0 CSC C4 MSBs

The default value for the 13-bit C4 is 0x18BD.

0x4C 7-0 CSC C4 LSBs

0x57 7 A/V Mute Override

0x57 6 A/V Mute Value

0x57 3 Disable AV Mute

0x57 2 Disable Audio Mute

0x58 7 MCLK PLL Enable

This bit enables the use of the analog PLL.

0x58 6-4 MCLK PLL_N

These bits control the division of the MCLK out of the

PLL.

AD9880

Rev. 0 | Page 50 of 64

Table 76.

PLL_N [2:0] MCLK Divide Value

0 /1

1 /2

2 /3

3 /4

4 /5

5 /6

6 /7

7 /8

0x58 3 N_CTS_Disable

This bit makes it possible to prevent the N/CTS packet

on the link from writing to the N and CTS registers.

0x58 2-0 MCLK fs_N

These bits control the multiple of 128 fs used for

MCLK out.

Table 77.

MCLK fs_N [2:0] fs Multiple

0 128

1 256

2 384

3 512

4 640

5 768

6 896

7 1024

0x59 6 MDA/MCL PU Disable

This bit disables the inter MDA/MCL pull-ups.

0x59 5 CLK Term O/R

This bit allows for overriding during power down.

0 = auto, 1 = manual.

0x59 4 Manual CLK Term

This bit allows normal clock termination or

disconnects this. 0 = normal, 1 = disconnected.

0x59 2 FIFO Reset UF

This bit resets the audio FIFO if underflow is detected.

0x59 1 FIFO Reset OF

This bit resets the audio FIFO if overflow is detected.

0x59 0 MDA/MCL Three-State

This bit three-states the MDA/MCL lines to allow in-

circuit programming of the EEPROM.

0x5A 6-0 Packet Detect

This register indicates if a data packet in specific

sections has been detected. These seven bits are

updated if any specific packet has been received since

last reset or loss of clock detect. Normal is 0x00.

Table 78.

Packet Detect Bit Packet Detected

0 AVI infoframe

1 Audio infoframe

2 SPD infoframe

3 MPEG Source infoframe

4 ACP packets

5 ISRC1 packets

6 ISRC2 packets

0x5B 3 HDMI Mode

0 = DVI, 1 = HDMI.

0x5E 7-6 Channel Status Mode

0x5E 5-3 PCM Audio Data

0x5E 2 Copyright Information

0x5E 1 Linear PCM Identification

0x5E 0 Use of Channel Status Block

0x5F 7-0 Channel Status Category Code

0x60 7-4 Channel Number

0x60 3-0 Source Number

0x61 5-4 Clock Accuracy

0x61 3-0 Sampling Frequency

Table 79.

Code Frequency (kHz)

0x0 44.1

0x2 48

0x3 32

0x8 88.2

0xA 96

0xC 176.4

0xE 192

0x62 3-0 Word Length

0x7B 7-0 CTS (Cycle Time Stamp) (19-12)

These are the most significant 8 bits of a 20-bit word

used in the 20-bit N term in the regeneration of the

audio clock.

0x7C 7-0 CTS (11-4)

0x7D 7-4 CTS (3-0)

0x7D 3-0 N (19-16)

These are the most significant 4 bits of a 20-bit word

used along with the 20-bit CTS term to regenerate the

audio clock.

0x80 AVI Infoframe Version

0x81 6-5 Y [1:0]

This register indicates whether data is RGB, 4:4:4 or

4:2:2.

AD9880

Rev. 0 | Page 51 of 64

Table 80.

Y Video Data

00 RGB

01 YCbCr 4:2:2

10 YCbCr 4:4:4

0x81 4 Active Format Information Present

0 = no data

1 = active format information valid

0x81 3-2 Bar Information

Table 81.

B Bar Type

00 No bar information

01 Horizontal bar information valid

10 Vertical bar information valid

11 Horizontal and vertical bar information valid

0x81 1-0 Scan Information

Table 82.

S [1:0] Scan Type

00 No information

01 Overscanned (television)

10 Underscanned (computer)

0x82 7-6 Colorimetry

Table 83.

C [1:0] Colorimetry

00 No data

01 SMPTE 170M, ITU601

10 ITU 709

0x82 5-4 Picture Aspect Ratio

Table 84.

M[1:0] Aspect Ratio

00 No data

01 4:3

10 16:9

0x82 3-0 Active Format Aspect Ratio

Table 85.

R [3:0] Active Format A/R

0x8 Same as picture aspect ratio (M [1:0])

0x9 4:3 (center)

0xA 16:9 (center)

0xB 14:9 (center)

0x83 1-0 Nonuniform Picture Scaling

Table 86.

SC [1:0] Picture Scaling

00 No known nonuniform scaling

01 Has been scaled horizontally

10 Has been scaled vertically

11 Has been scaled both horizontally and vertically

0x84 6-0 Video ID Code

See CEA EDID short video descriptors.

0x85 3-0 Pixel Repeat

This value indicates how many times the pixel was

repeated. 0x0 = no repeats, sent once, 0x8 = 8 repeats,

sent 9 times, and so on.

0x86 7-0 Active Line Start LSB

Combined with the MSB in Register 0x88, these bits

indicate the beginning line of active video. All lines

before this comprise a top horizontal bar. This is used

in letter box modes. If the 2-byte value is 0x00, there is

no horizontal bar.

0x87 6-0 New Data Flags (NDF)

This register indicates whether data in specific

sections has changed. In the address space from 0x80

to 0xFF, each register address ending in 0b111 (for

example, 0x87, 0x8F, 0x97, 0xAF) is an NDF register.

They all have the same data and all are reset upon

reading any one of them.

Table 87.

NDF Bit number Changes Occurred

0 AVI infoframe

1 Audio infoframe

2 SPD infoframe

3 MPEG Source infoframe

4 ACP packets

5 ISRC1 packets

6 ISRC2 packets

0x88 7-0 Active Line Start MSB

See Register 0x86.

0x89 7-0 Active Line End LSB

Combined with the MSB in Register 0x8A these bits

indicate the last line of active video. All lines past this

comprise a lower horizontal bar. This is used in letter-

box modes. If the 2-byte value is greater than the

number of lines in the display, there is no lower

horizontal bar.

0x8A 7-0 Active Line End MSB

See Register 0x89.

0x8B 7-0 Active Pixel Start LSB

Combined with the MSB in Register 0x8C, these bits

indicate the first pixel in the display which is active

video. All pixels before this comprise a left vertical bar.

If the 2-byte value is 0x00, there is no left bar.

0x8C 7-0 Active Pixel Start MSB

See Register 0x8B.

Part #	AD9880KSTZ-150
Description	PB-FREE 150 MHZ HDMI & ANALOGINTERFACE
Category	IC
Availability	Out of Stock
Qty	0

AD9880KSTZ-150

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