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AD9200ARSZ

Part # AD9200ARSZ
Description ADC SGL PIPELINED 20MSPS 10-BIT PARALLEL 28SSOP - Rail/Tub
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

REV. E
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Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.
AD9221/AD9223/AD9220
Complete 12-Bit 1.5/3.0/10.0 MSPS
Monolithic A/D Converters
FEATURES
Monolithic 12-Bit A/D Converter Product Family
Family Members Are: AD9221, AD9223, and AD9220
Flexible Sampling Rates: 1.5 MSPS, 3.0 MSPS, and
10.0 MSPS
Low Power Dissipation: 59 mW, 100 mW, and 250 mW
Single 5 V Supply
Integral Nonlinearity Error: 0.5 LSB
Differential Nonlinearity Error: 0.3 LSB
Input Referred Noise: 0.09 LSB
Complete On-Chip Sample-and-Hold Amplifier and
Voltage Reference
Signal-to-Noise and Distortion Ratio: 70 dB
Spurious-Free Dynamic Range: 86 dB
Out-of-Range Indicator
Straight Binary Output Data
28-Lead SOIC and 28-Lead SSOP
FUNCTIONAL BLOCK DIAGRAM
VINA
CAPT
CAPB
SENSE
OTR
BIT 1
(MSB)
BIT 12
(LSB)
VREF
DVSSAVSS
CML
AD9221/AD9223/AD9220
SHA
DIGITAL CORRECTION LOGIC
OUTPUT BUFFERS
VINB
1V
REFCOM
5
5
4
4
3
3
3
12
DVDDAVDD
CLK
MODE
SELECT
MDAC3
GAIN = 4
MDAC2
GAIN = 8
MDAC1
GAIN = 16
A/D
A/D
A/DA/D
GENERAL DESCRIPTION
The AD9221, AD9223, and AD9220 are a generation of high
performance, single supply 12-bit analog-to-digital converters.
Each device exhibits true 12-bit linearity and temperature drift
performance
1
as well as 11.5-bit or better ac performance.
2
The
AD9221/AD9223/AD9220 share the same interface options,
package, and pinout. Thus, the product family provides an upward
or downward component selection path based on performance,
sample rate and power. The devices differ with respect to their
specified sampling rate, and power consumption, which is reflected
in their dynamic performance over frequency.
The AD9221/AD9223/AD9220 combine a low cost, high speed
CMOS process and a novel architecture to achieve the resolution
and speed of existing hybrid and monolithic implementations at
a fraction of the power consumption and cost. Each device is a
complete, monolithic ADC with an on-chip, high performance,
low noise sample-and-hold amplifier and programmable voltage
reference. An external reference can also be chosen to suit the
dc accuracy and temperature drift requirements of the application.
The devices use a multistage differential pipelined architecture
with digital output error correction logic to provide 12-bit accu-
racy at the specified data rates and to guarantee no missing
codes over the full operating temperature range.
The input of the AD9221/AD9223/AD9220 is highly flexible,
allowing for easy interfacing to imaging, communications, medi-
cal, and data-acquisition systems. A truly differential input
structure allows for both single-ended and differential input
interfaces of varying input spans. The sample-and-hold
amplifier (SHA) is equally suited for both multiplexed sys-
tems that switch full-scale voltage levels in successive channels
as well as sampling single-channel inputs at frequencies up to
and beyond the Nyquist rate. Also, the AD9221/AD9223/AD9220
is well suited for communication systems employing Direct-
IF down conversion since the SHA in the differential input
mode can achieve excellent dynamic performance far beyond its
specified Nyquist frequency.
2
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary
output format. An out-of-range (OTR) signal indicates an over-
flow condition that can be used with the most significant bit to
determine low or high overflow.
PRODUCT HIGHLIGHTS
The AD9221/AD9223/AD9220 family offers a complete single-
chip sampling 12-bit, analog-to-digital conversion function in
pin compatible 28-lead SOIC and SSOP packages.
Flexible Sampling Rates—The AD9221, AD9223, and AD9220
offer sampling rates of 1.5 MSPS, 3.0 MSPS, and 10.0 MSPS,
respectively.
Low Power and Single Supply—The AD9221, AD9223, and
AD9220 consume only 59 mW, 100 mW, and 250 mW, respec-
tively, on a single 5 V power supply.
Excellent DC Performance Over Temperature—The AD9221/
AD9223/AD9220 provide 12-bit linearity and temperature drift
performance.
1
Excellent AC Performance and Low Noise—The AD9221/
AD9223/AD9220 provide better than 11.3 ENOB performance
and have an input referred noise of 0.09 LSB rms.
2
Flexible Analog Input Range—The versatile on-board sample-
and-hold (SHA) can be configured for either single-ended or
differential inputs of varying input spans.
NOTES
1
Excluding internal voltage reference.
2
Depends on the analog input configuration.
REV. E–2–
AD9221/AD9223/AD9220–SPECIFICATIONS
(AVDD = 5 V, DVDD = 5 V, f
SAMPLE
= Max Conversion Rate, V
REF
= 2.5 V, VINB = 2.5 V, T
MIN
to T
MAX
, unless
otherwise noted.)
Parameter AD9221 AD9223 AD9220 Unit
RESOLUTION 12 12 12 Bits min
MAX CONVERSION RATE 1.5 3 10 MHz min
INPUT REFERRED NOISE (TYP)
V
REF
= 1 V 0.23 0.23 0.23 LSB rms typ
V
REF
= 2.5 V 0.09 0.09 0.09 LSB rms typ
ACCURACY
Integral Nonlinearity (INL) ± 0.4 ± 0.5 ± 0.5 LSB typ
± 1.25 ± 1.25 ± 1.25 LSB max
Differential Nonlinearity (DNL) ± 0.3 ± 0.3 ± 0.3 LSB typ
± 0.75 ± 0.75 ± 0.75 LSB max
INL
1
± 0.6 ± 0.6 ± 0.7 LSB typ
DNL
1
± 0.3 ± 0.3 ± 0.35 LSB typ
No Missing Codes 12 12 12 Bits Guaranteed
Zero Error (@ 25°C) ± 0.3 ± 0.3 ± 0.3 % FSR max
Gain Error (@ 25°C)
2
± 1.5 ± 1.5 ± 1.5 % FSR max
Gain Error (@ 25°C)
3
± 0.75 ± 0.75 ± 0.75 % FSR max
TEMPERATURE DRIFT
Zero Error ± 2 ± 2 ± 2 ppm/°C typ
Gain Error
2
± 26 ± 26 ± 26 ppm/°C typ
Gain Error
3
± 0.4 ± 0.4 ± 0.4 ppm/°C typ
POWER SUPPLY REJECTION
AVDD, DVDD (+5 V ± 0.25 V) ± 0.06 ± 0.06 ± 0.06 % FSR max
ANALOG INPUT
Input Span (with V
REF
= 1.0 V) 222V p-p min
Input Span (with V
REF
= 2.5 V) 555V p-p max
Input (VINA or VINB) Range 000V min
AVDD AVDD AVDD V max
Input Capacitance 16 16 16 pF typ
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode) 111V typ
Output Voltage Tolerance (1 V Mode) ± 14 ± 14 ± 14 mV max
Output Voltage (2.5 V Mode) 2.5 2.5 2.5 V typ
Output Voltage Tolerance (2.5 V Mode) ±35 ±35 ±35 mV max
Load Regulation
4
2.0 2.0 2.0 mV max
REFERENCE INPUT RESISTANCE 555k typ
POWER SUPPLIES
Supply Voltages
AVDD 555V (± 5% AVDD Operating)
DVDD 2.7 to 5.25 2.7 to 5.25 2.7 to 5.25 V
Supply Current
IAVDD 14.0 26 58 mA max
11.8 20 51 mA typ
IDVDD 0.5 0.5 4.0 mA max
0.02 0.02 <1.0 mA typ
POWER CONSUMPTION 59.0 100 254 mW typ
70.0 130 310 mW max
NOTES
1
V
REF
= 1 V.
2
Including internal reference.
3
Excluding internal reference.
4
Load regulation with 1 mA load current (in addition to that required by the AD9221/AD9223/AD9220).
Specification subject to change without notice.
DC SPECIFICATIONS
REV. E
AD9221/AD9223/AD9220
–3–
AC SPECIFICATIONS
(AVDD = 5 V, DVDD= 5 V, f
SAMPLE
= Max Conversion Rate, V
REF
= 1.0 V, VINB = 2.5 V, DC Coupled/Single-
Ended Input T
MIN
to T
MAX
, unless otherwise noted.)
Parameter AD9221 AD9223 AD9220 Unit
MAX CONVERSION RATE 1.5 3.0 10.0 MHz min
DYNAMIC PERFORMANCE
Input Test Frequency 1 (VINA = –0.5 dBFS) 100 500 1000 kHz
Signal-to-Noise and Distortion (SINAD) 70.0 70.0 70 dB typ
69.0 68.5 68.5 dB min
Effective Number of Bits (ENOBs) 11.3 11.3 11.3 dB typ
11.2 11.1 11.1 dB min
Signal-to-Noise Ratio (SNR) 70.2 70.0 70.2 dB typ
69.0 68.5 69.0 dB min
Total Harmonic Distortion (THD) –83.4 –83.4 –83.7 dB typ
–77.5 –76.0 –76.0 dB max
Spurious Free Dynamic Range (SFDR) 86.0 87.5 88.0 dB typ
79.0 77.5 77.5 dB max
Input Test Frequency 2 (VINA = –0.5 dBFS) 0.50 1.50 5.0 MHz
Signal-to-Noise and Distortion (SINAD) 69.9 69.4 67.0 dB typ
69.0 68.0 65.0 dB min
Effective Number of Bits (ENOBs) 11.3 11.2 10.8 dB typ
11.2 11.1 10.5 dB min
Signal-to-Noise Ratio (SNR) 70.1 69.7 68.8 dB typ
69.0 68.5 67.5 dB min
Total Harmonic Distortion (THD) –83.4 –82.9 –72.0 dB typ
–77.5 –75.0 –68.0 dB max
Spurious Free Dynamic Range (SFDR) 86.0 85.7 75.0 dB typ
79.0 76.0 69.0 dB max
Full Power Bandwidth 25 40 60 MHz typ
Small Signal Bandwidth 25 40 60 MHz typ
Aperture Delay 111ns typ
Aperture Jitter 444ps rms typ
Acquisition to Full-Scale Step 125 43 30 ns typ
Specifications subject to change without notice.
DIGITAL SPECIFICATIONS
(AVDD = 5 V, DVDD = 5 V, T
MIN
to T
MAX
, unless otherwise noted.)
Parameter Symbol Unit
CLOCK INPUT
High Level Input Voltage V
IH
3.5 V min
Low Level Input Voltage V
IL
1.0 V max
High Level Input Current (V
IN
= DVDD) I
IH
± 10 µA max
Low Level Input Current (V
IN
= 0 V) I
IL
± 10 µA max
Input Capacitance C
IN
5 pF typ
LOGIC OUTPUTS
DVDD = 5 V
High Level Output Voltage (I
OH
= 50 µA) V
OH
4.5 V min
High Level Output Voltage (I
OH
= 0.5 mA) V
OH
2.4 V min
Low Level Output Voltage (I
OL
= 1.6 mA) V
OL
0.4 V max
Low Level Output Voltage (I
OL
= 50 µA) V
OL
0.1 V max
DVDD = 3 V
High Level Output Voltage (I
OH
= 50 µA) V
OH
2.95 V min
High Level Output Voltage (I
OH
= 0.5 mA) V
OH
2.80 V min
Low Level Output Voltage (I
OL
= 1.6 mA) V
OL
0.4 V max
Low Level Output Voltage (I
OL
= 50 µA) V
OL
0.05 V max
Output Capacitance C
OUT
5 pF typ
Specifications subject to change without notice.
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