REV. D
–3–
AD9012
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9012 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
NOTES
1
Measured with Analog Input = 0 V.
2
Measured by FFT analysis where fundamental is –3 dBc.
3
Input slew rate derived from rise time (10% to 90%) of full-scale step input.
4
Outputs terminated with two equivalent ’LS00 type loads. (See load circuit.)
5
Measured from ENCODE into data out for LSB only.
6
For full-scale step input, 8-bit accuracy is attained in specified time.
7
Recovers to 8-bit accuracy in specified time, after 150% full-scale input overvoltage.
8
Output time skew includes high-to-low and low-to-high transitions as well a
s
bit-to-bit time skew differences.
9
ENCODE signal rise/fall times should be less than 30 ns for normal operation.
10
Measured at 75 MSPS encode rate. Harmonic data based on worst case harmonics.
11
Analog input frequency = 1.23 MHz.
12
RMS signal to rms noise, including harmonics with 1.23 MHz. analog input
signal.
13
NPR measured @ 0.5 MHz. Noise Source is 250 mW (rms) from 0.5 MHz
to 8 MHz.
14
Supplies should remain stable within ± 5% for normal operation.
15
Measured at –5.2 V ± 5% and +5.0 V ± 5%.
Specifications subject to change without notice.
ORDERING GUIDE
Temperature Package
Device Linearity Ranges Options*
AD9012AQ 0.75 LSB –25°C to +85°C Q-28
AD9012BQ 0.50 LSB –25°C to +85°C Q-28
AD9012AJ 0.75 LSB –25°C to +85°C J-28A
AD9012BJ 0.50 LSB –25°C to +85°C J-28A
AD9012SQ 0.75 LSB –55°C to +125°C Q-28
AD9012SE 0.75 LSB –55°C to +125°C E-28A
AD9012TQ 0.50 LSB –55°C to +125°C Q-28
AD9012TE 0.50 LSB –55°C to +125°C E-28A
*E = Leadless Ceramic Chip Carrier; J = Ceramic Leaded Chip Carrier;
Q = Cerdip.
EXPLANATION OF TEST LEVELS
Test Level
I – 100% production tested.
II – 100% production tested at +25°C, and sample tested at
specified temperatures. AC testing done on sample basis.
III – Sample tested only.
IV – Parameter is guaranteed by design and characterization
testing.
V – Parameter is a typical value only.
VI – All devices are 100% production tested at +25°C. 100%
production tested at temperature extremes for extended
temperature devices; guaranteed by design and
characterization testing for industrial devices.
ABSOLUTE MAXIMUM RATINGS
1
Positive Supply Voltage (+V
S
) . . . . . . . . . . . . . . . . . . . . . +6 V
Analog to Digital Supply Voltage Differential (–V
S
) . . . .0.5 V
Negative Supply Voltage (–V
S
) . . . . . . . . . . . . . . . . . . . . –6 V
Analog Input Voltage . . . . . . . . . . . . . . . . . . . . . –V
S
to +0.5 V
ENCODE Input Voltage . . . . . . . . . . . . . . . . . –0.5 V to +5 V
OVERFLOW INH Input Voltage . . . . . . . . . . . –5.2 V to 0 V
Reference Input Voltage (+V
REF
–V
REF
)
2
. . . . –3.5 V to +0.1 V
Differential Reference Voltage . . . . . . . . . . . . . . . . . . . . .2.1 V
Reference Midpoint Current . . . . . . . . . . . . . . . . . . . . ±4 mA
Digital Output Current . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Operating Temperature Range
AD9012AQ/BQ/AJ/BJ . . . . . . . . . . . . . . . . –25°C to +85°C
AD9012SE/SQ/TE/TQ . . . . . . . . . . . . . . –55°C to +125°C
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Junction Temperature
3
. . . . . . . . . . . . . . . . . . . . . . . .+175°C
Lead Soldering Temperature (10 sec) . . . . . . . . . . . . . +300°C
NOTES
1
Absolute maximum ratings are limiting values, to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability under any of these conditions is not necessarily implied. Exposure to
absolute maximum rating conditions for extended periods may affect device
reliability.
2
+V
REF
≥ –V
REF
under all circumstances.
3
Maximum junction temperature (t
J
max) should not exceed +175°C for ceramic
packages, and +150°C for plastic packages:
t
J
= PD (θ
JA
) + t
A
PD (θ
JC
) + tc
where
PD = power dissipation
θ
JA
= thermal impedance from junction to ambient (°C/W)
θ
JC
= thermal impedance from junction to case (°C/W)
t
A
= ambient temperature (°C)
t
C
= case temperature (°C)
typical thermal impedances are:
Ceramic DIP θ
JA
= 42°C/W; θ
JC
= 10°C/W
Ceramic LCC θ
JA
= 50°C/W; θ
JC
= 15°C/W
JLCC θ
JA
= 59°C/W; θ
JC
= 15°C/W.
Recommended Operating Conditions
Input Voltage
Parameter Min Nominal Max
–V
S
–5.46 –5.20 –4.94
+V
S
+4.75 5.00 +5.25
+V
REF
–V
REF
0.0 V +0.1
–V
REF
–2.1 –2.0 +V
REF
Analog Input –V
REF
+V
REF
V
S
TTL
OUTPUT
15pF
1kV
Figure 1. Load Circuit
