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AD8608AR

Part # AD8608AR
Description OP Amp Quad GP R-R I/O 5.5V 14-Pin SOIC N - Rail/Tube
Category IC
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Analog Devices
Date Code: 0815
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

AD8605/AD8606/AD8608
Rev. D | Page 13 of 20
APPLICATION INFORMATION
OUTPUT PHASE REVERSAL
Phase reversal is defined as a change in polarity at the output of
the amplifier when a voltage that exceeds the maximum input
common-mode voltage drives the input.
Phase reversal can cause permanent damage to the amplifier; it
may also cause system lockups in feedback loops. The AD8605
does not exhibit phase reversal even for inputs exceeding the
supply voltage by more than 2 V.
TIME (4
µ
s/DIV)
VOLTAGE (2V/DIV)
V
OUT
V
IN
V
S
= ±2.5V
V
IN
= 5V p-p
A
V
= 1
R
L
= 10k
02731-D-043
Figure 43. No Phase Reversal
MAXIMUM POWER DISSIPATION
Power dissipated in an IC causes the die temperature to
increase. This can affect the behavior of the IC and the
application circuit performance.
The absolute maximum junction temperature of the AD8605/
AD8606/AD8608 is 150°C. Exceeding this temperature could
cause damage or destruction of the device. The maximum
power dissipation of the amplifier is calculated according to
the following formula:
JA
A
J
DISS
TT
P
θ
=
where:
T
J
= junction temperature
T
A
= ambient temperature
θ
JA
= junction to-ambient-thermal resistance
Figure 44 compares the maximum power dissipation with
temperature for the various AD8605 family packages.
TEMPERATURE (°C)
1.0
0.8
0
0 10020
POWER DISSIPATION (W)
40 60 80
0.6
0.4
0.2
SOIC-14
2.0
1.8
1.6
1.4
1.2
SOIC-8
SOT-23
MSOP
02731-D-044
TSSOP
Figure 44. Maximum Power Dissipation vs. Temperature
INPUT OVERVOLTAGE PROTECTION
The AD8605 has internal protective circuitry. However, if the
voltage applied at either input exceeds the supplies by more
than 2.5 V, external resistors should be placed in series with the
inputs. The resistor values can be determined by the formula
(
)
()
mA
R
VV
S
S
IN
5
200
+
The remarkable low input offset current of the AD8605 (<1 pA)
allows the use of larger value resistors. With a 10 kΩ resistor at
the input, the output voltage has less than 10 nV of error
voltage. A 10 kΩ resistor has less than 13 nV/√
Hz
of thermal
noise at room temperature.
THD + NOISE
Total harmonic distortion is the ratio of the input signal in V
rms to the total harmonics in V rms throughout the spectrum.
Harmonic distortion adds errors to precision measurements
and adds unpleasant sonic artifacts to audio systems.
The AD8605 has a low total harmonic distortion. Figure 45
shows that the AD8605 has less than 0.005% or 86 dB of THD
+ N over the entire audio frequency range. The AD8605 is
configured in positive unity gain, which is the worst case, and
with a load of 10 kΩ.
AD8605/AD8606/AD8608
Rev. D | Page 14 of 20
FREQUENCY (Hz)
0.1
0.01
0.0001
20 20k100
THD + N (%)
1k
0.001
10k
V
SY
= 2.5V
A
V
= 1
B
W
= 22kHz
02731-D-045
Figure 45. THD + N
TOTAL NOISE INCLUDING SOURCE RESISTORS
The low input current noise and input bias current of the
AD8605 make it the ideal amplifier for circuits with substantial
input source resistance such as photodiodes. Input offset voltage
increases by less than 0.5 nV per 1 kΩ of source resistance at
room temperature and increases to 10 nV at 85°C. The total
noise density of the circuit is
()
SS
nn
TOTAL
n
TRkRiee 4
2
2
,
++=
where:
e
n
is the input voltage noise density of the AD8605
i
n
is the input current noise density of the AD8605
R
S
is the source resistance at the noninverting terminal
k is Boltzmanns constant (1.38 × 10
−23
J/K)
T is the ambient temperature in Kelvin (T = 273 + °C)
For example, with R
S
= 10 kΩ, the total voltage noise density is
roughly 15 nV/√
Hz
.
For R
S
< 3.9 kΩ, e
n
dominates and e
n,TOTAL
e
n
.
The current noise of the AD8605 is so low that its total density
does not become a significant term unless R
S
is greater than
6 MΩ. The total equivalent rms noise over a specific bandwidth
is expressed as
()
BWeE
TOTALn
n
,
=
where BW is the bandwidth in hertz.
Note that the analysis above is valid for frequencies greater than
100 Hz and assumes relatively flat noise, above 10 kHz. For
lower frequencies, flicker noise (1/f) must be considered.
CHANNEL SEPARATION
Channel separation, or inverse crosstalk, is a measure of the
signal feed from one amplifier (channel) to an other on the
same IC.
The AD8606 has a channel separation of greater than −160 dB
up to frequencies of 1 MHz, allowing the two amplifiers to
amplify ac signals independently in most applications.
CHANNEL SEPARATION (dB)
FREQUENCY (Hz)
10M1M100k10k1k100 100M
–20
0
–40
–60
–80
–100
–120
–140
–160
–180
02731-D-046
Figure 46. Channel Separation vs. Frequency
CAPACITIVE LOAD DRIVE
The AD8605 can drive large capacitive loads without oscillation.
Figure 47 shows the output of the AD8606 in response to a
200 mV input signal. In this case, the amplifier was configured
in positive unity gain, worst case for stability, while driving a
1,000 pF load at its output. Driving larger capacitive loads in
unity gain may require the use of additional circuitry.
TIME (10
µ
s/DIV)
VOLTAGE (100mV/DIV)
V
S
= ±2.5V
A
V
= 1
R
L
= 10k
C
L
= 1
02731-D-047
Figure 47. Capacitive Load Drive without Snubber
A snubber network, shown in Figure 48, helps reduce the signal
overshoot to a minimum and maintain stability. Although this
circuit does not recover the loss of bandwidth induced by large
capacitive loads, it greatly reduces the overshoot and ringing.
This method does not reduce the maximum output swing of
the amplifier.
Figure 49 shows a scope photograph of the output at the
snubber circuit. The overshoot is reduced from over 70% to
less than 5%, and the ringing is eliminated by the snubber.
Optimum values for R
S
and C
S
are determined experimentally.
AD8605/AD8606/AD8608
Rev. D | Page 15 of 20
R
S
C
S
R
L
C
L
V+
V–
4
2
3
8
1
AD8605
V
IN
200mV
02731-D-049
Figure 48. Snubber Network Configuration
TIME (10
µ
s/DIV)
VOLTAGE (100mV/DIV)
V
S
= ±2.5V
A
V
= 1
R
L
= 10k
R
S
= 90
C
L
= 1,000pF
C
S
= 700pF
02731-D-048
Figure 49. Capacitive Load Drive with Snubber
Table 5 summarizes a few optimum values for capacitive loads.
Table 5.
C
L
(pF) R
S
(Ω) C
S
(pF)
500 100 1,000
1,000 70 1,000
2,000 60 800
An alternate technique is to insert a series resistor inside the
feedback loop at the output of the amplifier. Typically, the value
of this resistor is approximately 100 Ω. This method also
reduces overshoot and ringing but causes a reduction in the
maximum output swing.
LIGHT SENSITIVITY
The AD8605ACB (MicroCSP package option) is essentially
a silicon die with additional post fabrication dielectric and
intermetallic processing designed to contact solder bumps on
the active side of the chip. With this package type, the die is
exposed to ambient light and is subject to photoelectric effects.
Light sensitivity analysis of the AD8605ACB mounted on
standard PCB material reveals that only the input bias current
(I
B
) parameter is impacted when the package is illuminated
directly by high intensity light. No degradation in electrical
performance is observed due to illumination by low intensity
(0.1 mW/cm
2
) ambient light. Figure 50 shows that I
B
increases
with increasing wavelength and intensity of incident light;
I
B
can reach levels as high as 4500 pA at a light intensity of
3 mW/cm
2
and a wavelength of 850 nm. The light intensities
shown in Figure 50 are not normal for most applications, i.e.,
even though direct sunlight can have intensities of 50 mW/cm
2
,
office ambient light can be as low as 0.1 mW/cm
2
.
When the MicroCSP package is assembled on the board with
the bump-side of the die facing the PCB, reflected light from the
PCB surface is incident on active silicon circuit areas and results
in the increased I
B
. No performance degradation occurs due to
illumination of the backside (substrate) of the AD8605ACB.
The AD8605ACB is particularly sensitive to incident light with
wavelengths in the near infrared range (NIR, 700 nm to 1000
nm). Photons in this waveband have a longer wavelength and
lower energy than photons in the visible (400 nm to 700 nm)
and near ultraviolet bands (NUV, 200 nm to 400 nm); therefore,
they can penetrate more deeply into the active silicon. Incident
light with wavelengths greater than 1100 nm has no photo-
electric effect on the AD8605ACB because silicon is trans-
parent to wave lengths in this range. The spectral content of
conventional light sources varies: sunlight has a broad spectral
range, with peak intensity in the visible band that falls off in the
NUV and NIR bands; fluorescent lamps have significant peaks
in the visible but not in the NUV or NIR bands.
Efforts have been made at a product level to reduce the effect
of ambient light; the under bump metal (UBM) has been
designed to shield the sensitive circuit areas on the active side
(bump-side) of the die. However, if an application encounters
any light sensitivity with the AD8605ACB, shielding the bump
side of the MicroCSP package with opaque material should
eliminate this effect. Shielding can be accomplished using
materials such as silica filled liquid epoxies that are used in
flip chip underfill techniques.
WAVELENGTH (nm)
3500
0
350
INPUT BIAS CURRENT (pA)
2500
3000
2000
500
1000
1500
450 550 650 750 850
1mW/cm
2
4000
4500
5000
3mW/cm
2
2mW/cm
2
02731-D-050
Figure 50. AD8605ACB Input Bias Current Response to Direct Illumination of
Varying Intensity and Wavelength
MICROCSP ASSEMBLY CONSIDERATIONS
For detailed information on MicroCSP PCB assembly and
reliability, refer to ADI Application Note AN-617 on the ADI
website
www.analog.com.
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