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AD7654AST

Part # AD7654AST
Description Single ADC SAR 500ksps 16-bitParallel/Serial 48-Pin LQFP
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

16-Bit, 500 kSPS PulSAR
®
Dual,
2-Channel, Simultaneous Sampling ADC
AD7654
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 © 2005 Analog Devices, Inc. All rights reserved.
FEATURES
Dual, 16-bit, 2-channel simultaneous sampling ADC
16-bit resolution with no missing codes
Throughput:
500 kSPS (normal mode)
444 kSPS (impulse mode)
INL: ±3.5 LSB max (±0.0053% of full scale)
SNR: 89 dB typ @ 100 kHz
THD: −100 dB @ +100 kHz
Analog input voltage range: 0 V to 5 V
No pipeline delay
Parallel and serial 5 V/3 V interface
SPI®/QSPI™/MICROWIRE™/DSP compatible
Single 5 V supply operation
Power dissipation:
120 mW typical
2.6 mW @ 10 kSPS
Packages:
48-lead low profile quad flat package (LQFP)
48-lead lead frame chip scale package (LFCSP)
Low cost
APPLICATIONS
AC motor control
3-phase power control
4-channel data acquisition
Uninterrupted power supplies
Communications
FUNCTIONAL BLOCK DIAGRAM
CONTROL LOGIC AND
CALIBRATION CIRCUITRY
A/B
16
D[15:0]
BUSY
CS
SER/PAR
OGND
OVDD
DGND
D
V
DD
SERIAL
PORT
BYTESWAP
RD
A
V
DD
A
GND REFxREFGND
PD
RESET
CNVST
INAN
SWITCHED
CAP DAC
AD7654
INA1
IMPULSE
MUX
EOC
INA2
A0
INB1
INBN
INB2
TRACK/HOLD
×2
PARALLEL
INTERFACE
03057-001
CLOCK
MUX
MUX
Figure 1.
Table 1. PulSAR Selection
Type/kSPS 100 to 250 500 to 570 800 to 1000 >1000
Pseudo
Differential
AD7660/
AD7661
AD7653
AD7650/
AD7652
AD7664/
AD7666
AD7667
True Bipolar AD7663 AD7665 AD7671
True Differential AD7675 AD7676 AD7677 AD7621
AD7623
18-Bit AD7678 AD7679 AD7674 AD7641
Multichannel/
Simultaneous
AD7654 AD7655
GENERAL DESCRIPTION
The AD7654 is a low cost, simultaneous sampling, dual-
channel, 16-bit, charge redistribution SAR, analog-to-digital
converter that operates from a single 5 V power supply. It
contains two low noise, wide bandwidth, track-and-hold
amplifiers that allow simultaneous sampling, a high speed
16-bit sampling ADC, an internal conversion clock, error
correction circuits, and both serial and parallel system interface
ports. Each track-and-hold has a multiplexer in front to provide
a 4-channel input ADC. The A0 multiplexer control input
allows the choice of simultaneously sampling input pairs
INA1/INB1 (A0 = low) or INA2/INB2 (A0 = high). The part
features a very high sampling rate mode (normal) and, for low
power applications, a reduced power mode (impulse) where the
power is scaled with the throughput. Operation is specified
from −40°C to +85°C.
PRODUCT HIGHLIGHTS
1. Simultaneous Sampling.
The AD7654 features two sample-and-hold circuits that
allow simultaneous sampling. It provides inputs for four
channels.
2. Fast Throughput.
The AD7654 is a 500 kSPS, charge redistribution, 16-bit
SAR ADC with internal error correction circuitry.
3. Superior INL and No Missing Codes.
The AD7654 has a maximum integral nonlinearity of
3.5 LSB with no missing 16-bit codes.
4. Single-Supply Operation.
The AD7654 operates from a single 5 V supply. In impulse
mode, its power dissipation decreases with throughput.
5. Serial or Parallel Interface.
Versatile parallel or 2-wire serial interface arrangement is
compatible with both 3 V and 5 V logic.
AD7654
Rev. B | Page 2 of 28
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Product Highlights ........................................................................... 1
Specifications..................................................................................... 3
Timing Specifications .................................................................. 5
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Terminology .................................................................................... 11
Typical Performance Characteristics ........................................... 12
Application Information................................................................ 14
Circuit Information....................................................................14
Modes of Operation ................................................................... 14
Transfer Functions...................................................................... 14
Typical Connection Diagram ................................................... 16
Analog Inputs.............................................................................. 16
Input Channel Multiplexer........................................................ 16
Driver Amplifier Choice ........................................................... 16
Voltage Reference Input ............................................................ 17
Power Supply............................................................................... 17
Power Dissipation....................................................................... 17
Conversion Control ................................................................... 18
Digital Interface.......................................................................... 18
Parallel Interface......................................................................... 18
Serial Interface............................................................................ 20
Master Serial Interface............................................................... 20
Slave Serial Interface.................................................................. 22
Microprocessor Interfacing....................................................... 24
SPI Interface (ADSP-219x) ....................................................... 24
Application Hints ........................................................................... 25
Layout .......................................................................................... 25
Evaluating the AD7654 Performance...................................... 25
Outline Dimensions....................................................................... 26
Ordering Guide .......................................................................... 27
REVISION HISTORY
11/05—Rev. A to Rev. B
Changes to General Description .................................................... 1
Changes to Timing Specifications.................................................. 5
Changes to Figure 16...................................................................... 13
Changes to Figure 18...................................................................... 15
Added Table 8.................................................................................. 17
Changes to Figure 24...................................................................... 19
Changes to Figure 29...................................................................... 21
Updated Outline Dimensions....................................................... 26
Changes to Ordering Guide .......................................................... 26
11/04—Rev. 0 to Rev. A
Changes to Figure 7........................................................................ 12
Changes to Figure 18...................................................................... 15
Changes to Figure 19...................................................................... 16
Changes to Voltage Reference Input Section.............................. 17
Changes to Conversion Control Section..................................... 18
Changes to Digital Interface Section ........................................... 18
Updated Outline Dimensions...................................................... 25
11/02—Revision 0: Initial Version
AD7654
Rev. B | Page 3 of 28
SPECIFICATIONS
AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V; all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 2.
Parameter Conditions Min Typ Max Unit
RESOLUTION 16 Bits
ANALOG INPUT
Voltage Range V
INx
V
INxN
0 2 V
REF
V
Common-Mode Input Voltage V
INxN
−0.1 +0.5 V
Analog Input CMRR f
IN
= 100 kHz 55 dB
Input Current 500 kSPS throughput 45 µA
Input Impedance
1
THROUGHPUT SPEED
Complete Cycle In normal mode 2 µs
Throughput Rate In normal mode 0 500 kSPS
Complete Cycle In impulse mode 2.25 µs
Throughput Rate In impulse mode 0 444 kSPS
DC ACCURACY
Integral Linearity Error
2
−3.5 +3.5 LSB
3
No Missing Codes 16 Bits
Transition Noise 0.7 LSB
Full-Scale Error
4
T
MIN
to T
MAX
±0.25 ±0.5 % of FSR
Full-Scale Error Drift
4
±2 ppm/°C
Unipolar Zero Error
4
T
MIN
to T
MAX
±0.25 % of FSR
Unipolar Zero Error Drift
4
±0.8 ppm/°C
Power Supply Sensitivity AVDD = 5 V ±5% 0.8 LSB
AC ACCURACY
Signal-to-Noise f
IN
= 20 kHz 88 90 dB
5
f
IN
= 100 kHz 89 dB
Spurious-Free Dynamic Range f
IN
= 100 kHz 105 dB
Total Harmonic Distortion f
IN
= 100 kHz −100 dB
Signal-to-Noise and Distortion f
IN
= 20 kHz 87.5 90 dB
f
IN
= 100 kHz 88.5 dB
f
IN
= 100 kHz, −60 dB Input 30 dB
Channel-to-Channel Isolation f
IN
= 100 kHz −92 dB
−3 dB Input Bandwidth 10 MHz
SAMPLING DYNAMICS
Aperture Delay 2 ns
Aperture Delay Matching 30 ps
Aperture Jitter 5 ps rms
Transient Response Full-scale step 250 ns
REFERENCE
External Reference Voltage Range 2.3 2.5 AVDD/2 V
External Reference Current Drain 500 kSPS throughput 180 µA
DIGITAL INPUTS
Logic Levels
V
IL
−0.3 +0.8 V
V
IH
+2.0 DVDD + 0.3 V
I
IL
−1 +1 µA
I
IH
−1 +1 µA
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