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AD711-J

Part # AD711-J
Description
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

AD711
REV. A
–10–
Figure 31. Unipolar Binary Operation
Figure 32. Bipolar Operation
R1 and R2 calibrate the zero offset and gain error of the DAC.
Specific values for these resistors depend upon the grade of
AD7545 and are shown below.
Table I. Recommended Trim Resistor Values vs. Grades
of the AD7545 for V
DD
= +5 V
TRIM
RESISTOR JN/AQ/SD KN/BQ/TD LN/CQ/UD GLN/GCQ/GUD
R1 500 200 100 20
R2 150 68 33 6.8
Figures 33a and 33b show the settling time characteristics of the
AD711 when used as a DAC output buffer for the AD7545.
a. Full-Scale Positive b. Full-Scale Negative
Transition Transition
Figure 33. Settling Characteristics for AD711 with AD7545
NOISE CHARACTERISTICS
The random nature of noise, particularly in the 1/f region, makes
it difficult to specify in practical terms. At the same time, design-
ers of precision instrumentation require certain guaranteed maxi-
mum noise levels to realize the full accuracy of their equipment.
The AD711C grade is specified at a maximum level of 4.0 µV
p-p, in a 0.1 to 10 Hz bandwidth. Each AD711C receives a
100% noise test for two 10-second intervals; devices with any ex-
cursion in excess of 4.0 µV are rejected. The screened lot is then
submitted to Quality Control for verification on an AQL basis.
All other grades of the AD711 are sample-tested on an AQL
basis to a limit of 6 µV p-p, 0.1 to 10 Hz.
DRIVING THE ANALOG INPUT OF AN A/D CONVERTER
An op amp driving the analog input of an A/D converter, such as
that shown in Figure 34, must be capable of maintaining a con-
stant output voltage under dynamically changing load condi-
tions. In successive-approximation converters, the input current
is compared to a series of switched trial currents. The compari-
son point is diode clamped but may deviate several hundred mil-
livolts resulting in high frequency modulation of A/D input
current. The output impedance of a feedback amplifier is made
artificially low by the loop gain. At high frequencies, where the
loop gain is low, the amplifier output impedance can approach
its open loop value. Most IC amplifiers exhibit a minimum open
loop output impedance of 25 due to current limiting resistors.
A few hundred microamps reflected from the change in converter
Figure 34. AD711 as ADC Unity Gain Buffer
a. Full-Scale Positive
Transition
b. Full-Scale Negative
Transition
Figure 35. ADC Input Unity Gain Buffer Recovery Times
a. Source Current = 2 mA b. Sink Current = 1 mA
AD711
REV. A
–11–
loading can introduce errors in instantaneous input voltage. If
the A/D conversion speed is not excessive and the bandwidth of
the amplifier is sufficient, the amplifier’s output will return to
the nominal value before the converter makes its comparison.
However, many amplifiers have relatively narrow bandwidth
yielding slow recovery from output transients. The AD711 is
ideally suited to drive high speed A/D converters since it offers
both wide bandwidth and high open-loop gain.
DRIVING A LARGE CAPACITIVE LOAD
The circuit in Figure 36 employs a 100 isolation resistor
which enables the amplifier to drive capacitive loads exceeding
1500 pF; the resistor effectively isolates the high frequency feed-
back from the load and stabilizes the circuit. Low frequency
feedback is returned to the amplifier summing junction via the
low pass filter formed by the 100 series resistor and the load
capacitance, C
L
. Figure 37 shows a typical transient response
for this connection.
Figure 36. Circuit for Driving a Large Capacitive Load
Figure 37. Transient Response R
L
= 2 k
, C
L
= 500 pF
ACTIVE FILTER APPLICATIONS
In active filter applications using op amps, the dc accuracy of
the amplifier is critical to optimal filter performance. The
amplifier’s offset voltage and bias current contribute to output
error. Offset voltage will be passed by the filter and may be am-
plified to produce excessive output offset. For low frequency
applications requiring large value input resistors, bias currents
flowing through these resistors will also generate an offset
voltage.
In addition, at higher frequencies, an op amp’s dynamics must
be carefully considered. Here, slew rate, bandwidth, and
open-loop gain play a major role in op amp selection. The slew
rate must be fast as well as symmetrical to minimize distortion.
The amplifier’s bandwidth in conjunction with the filter’s gain
will dictate the frequency response of the filter.
The use of a high performance amplifier such as the AD711 will
minimize both dc and ac errors in all active filter applications.
SECOND ORDER LOW PASS FILTER
Figure 38 depicts the AD711 configured as a second order
Butterworth low pass filter. With the values as shown, the cor-
ner frequency will be 20 kHz; however, the wide bandwidth of
the AD711 permits a corner frequency as high as several hun-
dred kilohertz. Equations for component selection are shown
below.
R1 = R2 = user selected (typical values: 10 k – 100 k)
C1=
1.414
(2 π)( f
cutoff
)(R1)
, C2 =
0.707
(2 π)( f
cutoff
)(R1)
Where C1 and C2 are in farads.
Figure 38. Second Order Low Pass Filter
An important property of filters is their out-of-band rejection.
The simple 20 kHz low pass filter shown in Figure 38, might be
used to condition a signal contaminated with clock pulses or
sampling glitches which have considerable energy content at
high frequencies.
The low output impedance and high bandwidth of the AD711
minimize high frequency feedthrough as shown in Figure 39.
The upper trace is that of another low-cost BiFET op amp
showing 17 dB more feedthrough at 5 MHz.
Figure 39.
9-POLE CHEBYCHEV FILTER
Figure 40 shows the AD711 and its dual counterpart, the
AD712, as a 9-pole Chebychev filter using active frequency de-
pendent negative resistors (FDNR). With a cutoff frequency of
50 kHz and better than 90 dB rejection, it may be used as an
anti-aliasing filter for a 12-bit Data Acquisition System with
100 kHz throughput.
As shown in Figure 40, the filter is comprised of four FDNRs
(A, B, C, D) having values of 4.9395 3 10
–15
and 5.9276 3
10
–15
farad-seconds. Each FDNR active network provides a
two-pole response; for a total of 8 poles. The 9th pole consists
of a 0.001 µF capacitor and a 124 k resistor at Pin 3 of ampli-
fier A2. Figure 41 depicts the circuits for each FDNR with the
AD711
REV. A
–12–
C1018b-20-3/88
PRINTED IN U.S.A.
proper selection of R. To achieve optimal performance, the
0.001 µF capacitors must be selected for 1% or better matching
and all resistors should have 1% or better tolerance.
Figure 40. 9-Pole Chebychev Filter
Figure 41. FDNR for 9-Pole Chebychev Filter
Figure 42. High Frequency Response for 9-Pole
Chebychev Filter
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
TO-99 (H) Package
Cerdip (Q) Package
Mini-DIP (N) Package
Small Outline (R) Package
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