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AD5312BRMZ

Part # AD5312BRMZ
Description DAC 2CH RES-STRING 10-BIT 10MSOP - Rail/Tube
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

2.5 V to 5.5 V, 230 μA, Dual Rail-to-Rail,
Voltage Output 8-/10-/12-Bit DACs
AD5302/AD5312/AD5322
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 © 2006-2011 Analog Devices, Inc. All rights reserved.
FEATURES
AD5302: Two 8-bit buffered DACs in 1 package
A version: ±1 LSB INL, B version: ±0.5 LSB INL
AD5312: Two 10-bit buffered DACs in 1 package
A version: ±4 LSB INL, B version: ±2 LSB INL
AD5322: Two 12-bit buffered DACs in 1 package
A version: ±16 LSB INL, B version: ±8 LSB INL
10-lead MSOP
Micropower operation: 300 μA @ 5 V (including
reference current)
Power-down to 200 nA @ 5 V, 50 nA @ 3 V
2.5 V to 5.5 V power supply
Double-buffered input logic
Guaranteed monotonic by design over all codes
Buffered/Unbuffered reference input options
0 V to V
REF
output voltage
Power-on-reset to 0 V
Simultaneous update of DAC outputs via
LDAC
Low power serial interface with Schmitt-triggered inputs
On-chip rail-to-rail output buffer amplifiers
Qualified for automotive applications
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
GENERAL DESCRIPTION
The AD5302/AD5312/AD5322 are dual 8-, 10-, and 12-bit
buffered voltage output DACs in a 10-lead MSOP that operate
from a single 2.5 V to 5.5 V supply, consuming 230 A at 3 V.
Their on-chip output amplifiers allow the outputs to swing rail-
to-rail with a slew rate of 0.7 V/s. The AD5302/AD5312/AD5322
utilize a versatile 3-wire serial interface that operates at clock
rates up to 30 MHz and is compatible with standard SPI®,
QSPI™, MICROWIRE™, and DSP interface standards.
The references for the two DACs are derived from two reference
pins (one per DAC). The reference inputs can be configured as
buffered or unbuffered inputs. The outputs of both DACs can be
updated simultaneously using the asynchronous
LDAC
input.
The parts incorporate a power-on reset circuit, which ensures
that the DAC outputs power-up to 0 V and remain there until a
valid write takes place to the device. The parts contain a power-
down feature that reduces the current consumption of the
devices to 200 nA at 5 V (50 nA at 3 V) and provides software-
selectable output loads while in power-down mode.
The low power consumption of these parts in normal operation
makes them ideally suited for portable battery-operated
equipment. The power consumption is 1.5 mW at 5 V, 0.7 mW
at 3 V, reducing to 1 W in power-down mode.
FUNCTIONAL BLOCK DIAGRAM
DAC
REGISTER
RESISTOR
NETWORK
POWER-DOWN
LOGIC
RESISTOR
NETWORK
BUFFER
STRING
DAC
STRING
DAC
AD5302/AD5312/AD5322
INPUT
REGISTER
INPUT
REGISTER
DAC
REGISTER
INTERFACE
LOGIC
SCLK
POWER-ON
RESET
V
DD
V
REF
A
V
OUT
AV
OUT
A
V
OUT
BV
OUT
B
GNDV
REF
B
LDAC
DIN
00928-001
SYNC
BUFFER
Figure 1.
AD5302/AD5312/AD5322
Rev. D | Page 2 of 24
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AC Specifications.......................................................................... 4
Timing Characteristics ................................................................ 5
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Terminology ...................................................................................... 9
Typical Performance Characteristics ........................................... 10
Functional Description .................................................................. 14
Digital-to-Analog Section ......................................................... 14
Resistor String............................................................................. 14
DAC Reference Inputs ............................................................... 14
Output Amplifier........................................................................ 14
Power-On Reset .......................................................................... 14
Serial Interface ................................................................................ 15
Input Shift Register..................................................................... 15
Low Power Serial Interface ....................................................... 15
Double-Buffered Interface ........................................................ 15
Power-Down Modes ...................................................................... 16
Microprocessor Interfacing........................................................... 17
AD5302/AD5312/AD5322 to ADSP-2101/ADSP-2103
Interface ....................................................................................... 17
AD5302/AD5312/AD5322 to 68HC11/68L11 Interface ...... 17
AD5302/AD5312/AD5322 to 80C51/80L51 Interface.......... 17
AD5302/AD5312/AD5322 to MICROWIRE Interface ........ 17
Applications Information.............................................................. 18
Typical Application Circuit....................................................... 18
Bipolar Operation Using the AD5302/AD5312/AD5322..... 18
Opto-Isolated Interface for Process Control Applications ... 19
Decoding Multiple AD5302/AD5312/AD5322s.................... 19
AD5302/AD5312/AD5322 as a Digitally Programmable
Window Detector....................................................................... 19
Coarse and Fine Adjustment Using the
AD5302/AD5312/AD5322 ....................................................... 20
Power Supply Bypassing and Grounding................................ 20
Outline Dimensions ....................................................................... 21
Ordering Guide .......................................................................... 22
REVISION HISTORY
5/11—Rev. C to Rev. D
Added Automotive Products Information ................. Throughout
Updated Outline Dimensions....................................................... 21
Changes to Ordering Guide .......................................................... 22
4/06—Rev. B to Rev. C
Updated Format..................................................................Universal
Updated Outline Dimensions....................................................... 21
Changes to Ordering Guide .......................................................... 21
12/05—Rev. A to Rev. B
Updated Format..................................................................Universal
Updated Outline Dimensions....................................................... 21
Changes to Ordering Guide.......................................................... 21
8/03—Rev. 0 to Rev. A
Changes to Features ..........................................................................1
Changes to Specifications.................................................................2
Changes to Absolute Maximum Ratings........................................4
Changes to Ordering Guide.............................................................4
Updated Outline Dimensions....................................................... 16
AD5302/AD5312/AD5322
Rev. D | Page 3 of 24
SPECIFICATIONS
V
DD
= 2.5 V to 5.5 V, V
REF
= 2 V, R
L
= 2 kΩ to GND, C
L
= 200 pF to GND, all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 1.
A Version
1
B Version
1
Parameter
2
Min Typ Max Min Typ Max Unit Test Conditions/Comments
DC PERFORMANCE
3, 4
AD5302
Resolution 8 8 Bits
Relative Accuracy ±0.15 ±1 ±0.15 ±0.5 LSB
Differential Nonlinearity ±0.02 ±0.25 ±0.02 ±0.25 LSB Guaranteed monotonic by design over all codes
AD5312
Resolution 10 10 Bits
Relative Accuracy ±0.5 ±4 ±0.5 ±2 LSB
Differential Nonlinearity ±0.05 ±0.5 ±0.05 ±0.5 LSB Guaranteed monotonic by design over all codes
AD5322
Resolution 12 12 Bits
Relative Accuracy ±2 ±16 ±2 ±8 LSB
Differential Nonlinearity ±0.2 ±1 ±0.2 ±1 LSB Guaranteed monotonic by design over all codes
Offset Error ±0.4 ±3 ±0.4 ±3 % of FSR
See
Figure 3 and Figure 4
Gain Error ±0.15 ±1 ±0.15 ±1 % of FSR
See
Figure 3 and Figure 4
Lower Deadband 10 60 10 60 mV
See
Figure 3 and Figure 4
Offset Error Drift
5
−12 −12 ppm of
FSR/°C
Gain Error Drift
5
−5 −5 ppm of
FSR/°C
Power Supply Rejection
Ratio
5
−60 −60 dB V
DD
= ±10%
DC Crosstalk
5
30 30 µV
DAC REFERENCE INPUTS
5
V
REF
Input Range 1 V
DD
1 V
DD
V Buffered reference mode
0 V
DD
0 V
DD
V Unbuffered reference mode
V
REF
Input Impedance >10 >10 MΩ Buffered reference mode
180 180 kΩ Unbuffered reference mode, input impedance = R
DAC
Reference Feedthrough −90 −90 dB Frequency = 10 kHz
Channel-to-Channel
Isolation
−80 −80 dB Frequency = 10 kHz
OUTPUT CHARACTERISTICS
5
Minimum Output Voltage
6
0.001 0.001 V min A measure of the minimum drive capability of
the output amplifier
Maximum Output Voltage
6
V
DD
0.001
V
DD
0.001
V max A measure of the maximum drive capability of
the output amplifier
DC Output Impedance 0.5 0.5
Short-Circuit Current 50 50 mA V
DD
= 5 V
20 20 mA V
DD
= 3 V
Power-Up Time 2.5 2.5 µs Coming out of power-down mode, V
DD
= 5 V
5 5 µs Coming out of power-down mode, V
DD
= 3 V
LOGIC INPUTS
5
Input Current ±1 ±1 µA
V
IL
, Input Low Voltage 0.8 0.8 V V
DD
= 5 V ± 10%
0.6 0.6 V V
DD
= 3 V ± 10%
0.5 0.5 V V
DD
= 2.5 V
V
IH
, Input High Voltage 2.4 2.4 V V
DD
= 5 V ± 10%
2.1 2.1 V V
DD
= 3 V ± 10%
2.0 2.0 V V
DD
= 2.5 V
Pin Capacitance 2 3.5 2 3.5 pF
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