Data Sheet
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
25
©2006 Silicon Storage Technology, Inc. S71255-05-000 5/06
Symbol Function
EXTRAM Internal/External RAM access
0: Internal Expanded RAM access within range of 00H to 2FFH using MOVX @Ri /
@DPTR. Beyond 300H, the MCU always accesses external data memory.
For details, refer to Section 3.4, “Expanded Data RAM Addressing” .
1: External data memory access.
AO Disable/Enable ALE
0: ALE is emitted at a constant rate of 1/3 the oscillator frequency in 6 clock mode, 1/6 f
OSC
in
12 clock mode.
1: ALE is active only during a MOVX or MOVC instruction.
Symbol Function
GF2 General purpose user-defined flag.
DPS DPTR registers select bit.
0: DPTR0 is selected.
1: DPTR1 is selected.
Symbol Function
WDOUT Watchdog output enable.
0: Watchdog reset will not be exported on Reset pin.
1: Watchdog reset if enabled by WDRE, will assert Reset pin for 32 clocks.
WDRE Watchdog timer reset enable.
0: Disable watchdog timer reset.
1: Enable watchdog timer reset.
WDTS Watchdog timer reset flag.
0: External hardware reset or power-on reset clears the flag.
Flag can also be cleared by writing a 1.
Flag survives if chip reset happened because of watchdog timer overflow.
1: Hardware sets the flag on watchdog overflow.
WDT Watchdog timer refresh.
0: Hardware resets the bit when refresh is done.
1: Software sets the bit to force a watchdog timer refresh.
SWDT Start watchdog timer.
0: Stop WDT.
1: Start WDT.
Auxiliary Register (AUXR)
Location76543210Reset Value
8EH------EXTRAMAOxxxxxx00b
Auxiliary Register 1 (AUXR1)
Location76543210Reset Value
A2H----GF20-DPSxxxx00x0b
Watchdog Timer Control Register (WDTC)
Location76543210Reset Value
C0H - - - WDOUT WDRE WDTS WDT SWDT xxx00000b
