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89V54RD

Part # 89V54RD
Description
Category IC
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SST
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Date Code: 0619
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

16
Data Sheet
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
©2006 Silicon Storage Technology, Inc. S71255-05-000 5/06
3.5 Dual Data Pointers
The device has two 16-bit data pointers. The DPTR Select (DPS) bit in AUXR1 determines which of the two data
pointers is accessed. When DPS=0, DPTR0 is selected; when DPS=1, DPTR1 is selected. Quickly switching
between the two data pointers can be accomplished by a single INC instruction on AUXR1. (See Figure 3-5)
FIGURE 3-5: Dual Data Pointer Organization
3.6 Special Function Registers
Most of the unique features of the FlashFlex51 microcontroller family are controlled by bits in special function regis-
ters (SFRs) located in the SFR memory map shown in Table 3-4. Individual descriptions of each SFR are provided
and reset values indicated in Tables 3-5 to 3-9.
TABLE 3-4: FlashFlex51 SFR Memory Map
8 BYTES
F8H IP1
1
1. Bit addressable SFRs
CH CCAP0H CCAP1H CCAP2H CCAP3H CCAP4H FFH
F0H B
1
IP1H F7H
E8H IEA
1
CL CCAP0L CCAP1L CCAP2L CCAP3L CCAP4L EFH
E0H ACC
1
E7H
D8H CCON
1
CMOD CCAPM0 CCAPM1 CCAPM2 CCAPM3 CCAPM4 DFH
D0H PSW
1
SPCR D7H
C8H T2CON
1
T2MOD RCAP2L RCAP2H TL2 TH2 CFH
C0H WDTC
1
C7H
B8H IP
1
SADEN BFH
B0H P3
1
SFCF SFCM SFAL SFAH SFDT SFST IPH B7H
A8H IE
1
SADDR SPSR XICON AFH
A0H P2
1
AUXR1 P4 A7H
98H SCON
1
SBUF 9FH
90H P1
1
97H
88H TCON
1
TMOD TL0 TL1 TH0 TH1 AUXR 8FH
80H P0
1
SP DPL DPH WDTD SPDR PCON 87H
T3-4.0 1255
DPL
82H
DPS = 0 DPTR0
DPS = 1 DPTR1
External Data Memory
DPS
1255 F06.0
DPH
83H
DPTR0
DPTR1
AUXR1 / bit0
Data Sheet
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
17
©2006 Silicon Storage Technology, Inc. S71255-05-000 5/06
TABLE 3-5: CPU related SFRs
Symbol Description
Direct
Address
Bit Address, Symbol, or Alternative Port Function
Reset
ValueMSB LSB
ACC
1
Accumulator E0H ACC[7:0] 00H
B
1
B Register F0H B[7:0] 00H
PSW
1
Program Status
Word
D0H CY AC F0 RS1 RS0 OV F1 P 00H
SP Stack Pointer 81H SP[7:0] 07H
DPL Data Pointer
Low
82H DPL[7:0] 00H
DPH Data Pointer
High
83H DPH[7:0] 00H
IE
1
Interrupt Enable A8H EA EC ET2 ES ET1 EX1 ET0 EX0 00H
IEA
1
Interrupt
Enable A
E8H - - - - EBO - - - xxxx0xxxb
IP
1
Interrupt Priority
Reg
B8H - PPC PT2 PS PT1 PX1 PT0 PX0 x0000000b
IPH Interrupt Priority
Reg High
B7H - PPCH PT2H PSH PT1H PX1H PT0H PX0H x0000000b
IP1
1
Interrupt Priority
Reg A
F8H - - - - PBO PX3 PX2 - xxxx0xxxb
IP1H Interrupt Priority
Reg A High
F7H - - - - PBOH PX3H PX3 - xxxx0xxxb
PCON Power Control 87H SMOD1 SMOD0 BOF POF GF1 GF0 PD IDL 00010000b
AUXR Auxiliary Reg 8EH - - - - - - EXTRAM AO xxxxxxx00b
AUXR1 Auxiliary Reg 1 A2H - - - - GF2 0 - DPS xxxx00x0b
XICON
2
External
Interrupt Control
AEH X EX3 IE3 IT3 0 EX2 IE2 IT2 00H
T3-5.0 1255
1. Bit Addressable SFRs
2. X = Don’t care
TABLE 3-6: Flash Memory Programming SFRs
Symbol Description
Direct
Address
Bit Address, Symbol, or Alternative Port Function
Reset
ValueMSB LSB
SFCF SuperFlash
Configuration
B1H - IAPEN - - - - SWR BSEL x0xxxx00b
SFCM SuperFlash
Command
B2H FIE FCM[6:0] 00H
SFAL SuperFlash
Address Low
B3H SuperFlash Low Order Byte Address Register - A
7
to A
0
(SFAL) 00H
SFAH SuperFlash
Address High
B4H SuperFlash High Order Byte Address Register - A
15
to A
8
(SFAH) 00H
SFDT SuperFlash
Data
B5H SuperFlash Data Register 00H
SFST SuperFlash
Status
B6H SB1_i SB2_i SB3_i - EDC_i FLASH_BUSY - - 000x00xxb
T3-6.0 1255
18
Data Sheet
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
©2006 Silicon Storage Technology, Inc. S71255-05-000 5/06
TABLE 3-7: Watchdog Timer SFRs
Symbol Description
Direct
Address
Bit Address, Symbol, or Alternative Port Function
Reset
ValueMSB LSB
WDTC
1
Watchdog Timer
Control
C0H - - - WDOUT WDRE WDTS WDT SWDT xxx00x00b
WDTD Watchdog Timer
Data/Reload
85H Watchdog Timer Data/Reload 00H
T3-7.0 1255
1. Bit Addressable SFRs
TABLE 3-8: Timer/Counters SFRs
Symbol Description
Direct
Address
Bit Address, Symbol, or Alternative Port Function
Reset
ValueMSB LSB
TMOD Timer/Counter
Mode Control
89H Timer 1 Timer 0 00H
GATE C/T# M1 M0 GATE C/T# M1 M0
TCON
1
1. Bit Addressable SFRs
Timer/Counter
Control
88H TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 00H
TH0 Timer 0 MSB 8CH TH0[7:0] 00H
TL0 Timer 0 LSB 8AH TL0[7:0] 00H
TH1 Timer 1 MSB 8DH TH1[7:0] 00H
TL1 Timer 1 LSB 8BH TL1[7:0] 00H
T2CON
1
Timer / Counter 2
Control
C8H TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2# CP/RL2# 00H
T2MOD
2
2. X = Don’t care
Timer2
Mode Control
C9H X - - - - - T2OE DCEN xxxxxx00b
TH2 Timer 2 MSB CDH TH2[7:0] 00H
TL2 Timer 2 LSB CCH TL2[7:0] 00H
RCAP2H Timer 2
Capture MSB
CBH RCAP2H[7:0] 00H
RCAP2L Timer 2
Capture LSB
CAH RCAP2L[7:0] 00H
T3-8.0 1255
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