Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

8406601QA

Part # 8406601QA
Description
Category IC
Availability In Stock
Qty 4
Qty Price
1 - 2 $81.61594
3 + $61.83026
Manufacturer Available Qty
INTERPOINT
Date Code: 0025
  • Shipping Freelance Stock: 1
    Ships Immediately
INTERSIL
  • Shipping Freelance Stock: 3
    Ships Immediately



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

13
Special Mode Combination Considerations
There are several combinations of modes possible. For any
combination, some or all of Port C lines are used for control
or status. The remaining bits are either inputs or outputs as
defined by a “Set Mode” command.
During a read of Port C, the state of all the Port C lines,
except the
ACK and STB lines, will be placed on the data
bus. In place of the
ACK and STB line states, flag status will
appear on the data bus in the PC2, PC4, and PC6 bit
positions as illustrated by Figure 17.
Through a “Write Port C” command, only the Port C pins
programmed as outputs in a Mode 0 group can be written.
No other pins can be affected by a “Write Port C” command,
nor can the interrupt enable flags be accessed. To write to
any Port C output programmed as an output in Mode 1 group
or to change an interrupt enable flag, the “Set/Reset Port C
Bit” command must be used.
With a “Set/Reset Port Cea Bit” command, any Port C line
programmed as an output (including IBF and
OBF) can be
written, or an interrupt enable flag can be either set or reset.
Port C lines programmed as inputs, including
ACK and STB
lines, associated with Port C fare not affected by a
“Set/Reset Port C Bit” command. Writing to the correspond-
ing Port C bit positions of the
ACK and STB lines with the
“Set Reset Port C Bit” command will affect the Group A and
Group B interrupt enable flags, as illustrated in Figure 17.
Current Drive Capability
Any output on Port A, B or C can sink or source 2.5mA. This
feature allows the 82C55A to directly drive Darlington type
drivers and high-voltage displays that require such sink or
source current.
MODE DEFINITION SUMMARY
MODE 0 MODE 1 MODE 2
IN OUT IN OUT GROUP A ONLY
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
In
In
In
In
In
In
In
In
Out
Out
Out
Out
Out
Out
Out
Out
In
In
In
In
In
In
In
In
Out
Out
Out
Out
Out
Out
Out
Out
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
In
In
In
In
In
In
In
In
Out
Out
Out
Out
Out
Out
Out
Out
In
In
In
In
In
In
In
In
Out
Out
Out
Out
Out
Out
Out
Out
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
In
In
In
In
In
In
In
In
Out
Out
Out
Out
Out
Out
Out
Out
INTRB
IBFB
STBB
INTRA
STBA
IBFA
I/O
I/O
INTRB
OBFB
ACKB
INTRA
I/O
I/O
ACKA
OBFA
I/O
I/O
I/O
INTRA
STBA
IBFA
ACKA
OBFA
Mode 0
or Mode 1
Only
INPUT CONFIGURATION
D7 D6 D5 D4 D3 D2 D1 D0
I/O I/O IBFA INTEA INTRA INTEB IBFB INTRB
OUTPUT CONFIGURATION
D7 D6 D5 D4 D3 D2 D1 D0
OBFA INTEA I/O I/O INTRA INTEB OBFB INTRB
FIGURE 15. MODE 1 STATUS WORD FORMAT
D7 D6 D5 D4 D3 D2 D1 D0
OBFA INTE1 IBFA INTE2 INTRA X X X
(Defined by Mode 0 or Mode 1 Selection)
FIGURE 16. MODE 2 STATUS WORD FORMAT
GROUP A
GROUP B
GROUP A
GROUP B
GROUP A
GROUP B
82C55A
14
Reading Port C Status (Figures 15 and 16)
In Mode 0, Port C transfers data to or from the peripheral
device. When the 82C55A is programmed to function in
Modes 1 or 2, Port C generates or accepts “hand shaking”
signals with the peripheral device. Reading the contents of
Port C allows the programmer to test or verify the “status” of
each peripheral device and change the program flow
accordingly.
There is not special instruction to read the status information
from Port C. A normal read operation of Port C is executed to
perform this function.
Applications of the 82C55A
The 82C55A is a very powerful tool for interfacing peripheral
equipment to the microcomputer system. It represents the
optimum use of available pins and flexible enough to inter-
face almost any I/O device without the need for additional
external logic.
Each peripheral device in a microcomputer system usually
has a “service routine” associated with it. The routine
manages the software interface between the device and the
CPU. The functional definition of the 82C55A is programmed
by the I/O service routine and becomes an extension of the
system software. By examining the I/O devices interface
characteristics for both data transfer and timing, and
matching this information to the examples and tables in the
detailed operational description, a control word can easily be
developed to initialize the 82C55A to exactly “fit” the
application. Figures 18 through 24 present a few examples
of typical applications of the 82C55A.
INTERRUPT
ENABLE FLAG POSITION
ALTERNATE PORT C
PIN SIGNAL (MODE)
INTE B PC2 ACKB (Output Mode 1)
or STBB (Input Mode 1)
INTE A2 PC4 STBA (Input Mode 1 or
Mode 2)
INTE A1 PC6 ACKA (Output Mode 1 or
Mode 2)
FIGURE 17. INTERRUPT ENABLE FLAGS IN MODES 1 AND 2
FIGURE 18. PRINTER INTERFACE
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PC7
PC6
PC5
PC4
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC1
PC2
DATA READY
ACK
PAPER FEED
FORWARD/REV.
DATA READY
ACK
PAPER FEED
FORWARD/REV.
RIBBON
CARRIAGE SEN.
MODE 1
(OUTPUT)
82C55A
MODE 1
(OUTPUT)
CONTROL LOGIC
AND DRIVERS
INTERRUPT
REQUEST
PC0
INTERRUPT
REQUEST
PC3
HAMMER
RELAYS
HIGH SPEED
PRINTER
82C55A
15
FIGURE 19. KEYBOARD AND DISPLAY INTERFACE
FIGURE 20. KEYBOARD AND TERMINAL ADDRESS
INTERFACE
FIGURE 21. DIGITAL TO ANALOG, ANALOG TO DIGITAL FIGURE 22. BASIC CRT CONTROLLER INTERFACE
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PC4
PC5
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC1
PC2
STROBE
ACK
DATA READY
ACK
MODE 1
(OUTPUT)
82C55A
MODE 1
(INPUT)
FULLY
DECODED
INTERRUPT
REQUEST
INTERRUPT
REQUEST
PC3
PC6
PC7
KEYBOARD
R0
R1
R2
R3
R4
R5
SHIFT
CONTROL
B0
B1
B2
B3
B4
B5
BACKSPACE
CLEAR
BURROUGHS
SELF-SCAN
DISPLAY
BLANKING
CANCEL WORD
STROBE
ACK
FULLY
DECODED
KEYBOARD
R0
R1
R2
R3
R4
R5
SHIFT
CONTROL
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PC4
PC5
PC6
PC7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
MODE 0
(INPUT)
82C55A
MODE 1
(INPUT)
PC3
BUST LT
TEST LT
TERMINAL
ADDRESS
INTERRUPT
REQUEST
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PC4
PC5
PC6
PC7
PC1
PC2
PC3
PB0
PB1
PB2
PC4
PC5
LSB
STB DATA
MAB
MODE 0
(INPUT)
82C55A
MODE 0
(OUTPUT)
12-BIT
A/D
CONVERTER
(DAC)
PC0
PB3
PC6
PC7
BIT
SET/RESET
SAMPLE EN
STB
LSB
8-BIT
D/A
CONVERTER
(ADC)
ANALOG
INPUT
ANALOG
OUTPUT
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PC7
PC6
PC5
PC4
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC2
PC1
MODE 0
(OUTPUT)
82C55A
MODE 1
(OUTPUT)
PC3
DATA READY
ACK
CRT CONTROLLER
CHARACTER GEN.
INTERRUPT
REQUEST
REFRESH BUFFER
R0
R1
R2
R3
R4
R5
SHIFT
CONTROL
ROW STB
COLUMN STB
CURSOR H/V STB
CURSOR/ROW/COLUMN
CURSOR CONTROL
PC0
ADDRESS
H&V
BLANKED
BLACK/WHITE
82C55A
PREVIOUS123456789NEXT