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7705201EA

Part # 7705201EA
Description ANLG MUX SGL 8:1 22V/22V 16CDIP - Bulk
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

DG508A_MIL/509A_MIL
Vishay Siliconix
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com FaxBack 408-970-5600
5-1
Single 8-Ch/Differential 4-Ch CMOS Analog Multiplexers
(Obsolete for non-hermetic. Use DG408/409 as pin-for-pin replacements.)
  
Low On-Resistance: 240
TTL and CMOS Logic Compatible
Low Power: 30 mW
Break-Before-Make Switching
44-V Power Supply Rating
Transition Time: 600 ns
Easily Interfaced
Low Power Consumption
Low System Crosstalk
Wide Analog Signal Range
Communication Systems
ATE
Data Acquisition Systems
Audio Signal Routing and Multiplexing
Medical Instrumentation

The DG508A_MIL, an 8-channel single-ended analog
multiplexer, is designed to connect one of eight inputs to a
common output as determined by a 3-bit binary address (A
0
,
A
1
, A
2
).
The DG509A_MIL, a dual 4-channel analog multiplexer, is
designed to connect one of four differential inputs to a common
output as determined by its 2-bit binary address (A
0
, A
1
) logic.
Break-before-make switching action protects against
momentary shorting of the input signals.
A channel in the on state conducts current equally well in both
directions. In the off state each channel blocks voltages up to
the power supply rails, normally 30 V peak-to-peak. An enable
(EN) function allows for device selection when several
multiplexers are used All control inputs, address (A
X
) and
enable (EN) are TTL or CMOS compatible over the full
specified operating temperature range.
Fabricated in the Vishay Siliconix Plus-40 process, the
absolute maximum voltage rating is extended to 44 V, allowing
increased operating headroom for standard 15-V signal
swings and operation with 20-V supplies. An epitaxial layer
prevents latch up.
The DG508A_MIL/509A_MIL are available in hermetic
packages. For plastic packages, use the DG408/409 as
pin-for-pin replacements.
For applications requiring address data latching, the
DG528/529 is recommended. DG408/409 is recommended
for higher precision applications. For wideband/video routing
and multiplexing, the DG538A is recommended.
     
S
3
A
0
S
6
D
S
4
A
1
S
8
S
7
EN
Dual-In-Line
A
2
V– GND
S
1
V+
S
2
S
5
Decoders/Drivers
1
2
3
4
5
6
7
16
15
14
13
12
11
10
Top View
89
DG508A_MIL
Key
V–
NC
GND
S
8
S
1
S
7
V+
S
4
NC
D
NC
NC
S
2
A
1
S
5
A
2
S
3
EN
S
6
A
0
910111213
4
5
6
7
8
1231920
14
15
16
17
18
Top View
LCC
Decoders/Drivers
DG508A_MIL
DG508A_MIL/509A_MIL
Vishay Siliconix
www.vishay.com S FaxBack 408-970-5600
5-2
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
FUNCTIONAL BLOCK DIAGRAMS AND PIN CONFIGURATIONS
ORDERING INFORMATION - DG508A_MIL
Temp Range Package Part Number
0 to 70_C 16-Pin Plastic DIP DG508ACJ
–25 to 85_C 16-Pin CerDIP DG508ABK
–40 to 85_C 16-Pin Narrow SOIC DG508ADY
55 125 C
16
-
Pin CerDIP
DG508AAK
55 125 C
16
-
Pin
CerDIP
DG508AAK/883
55 125 C
LCC-20 DG508AAZ/883
55 125 C
16
-
Pin Sidebraze
7705201EA
–55 to 125_C
16
-
Pin
Sidebraze
7705201EC
16
-
Pin Flat Pack
7705201FA
16
-
Pin
Flat
Pack
7705201FC
16
-
Pin Sidebraze
JM38510/19007BEA
16
-
Pin
Sidebraze
JM38510/19007BEC
TRUTH TABLE - DG508A_MIL
A
2
A
1
A
0
EN On Switch
X X X 0 None
0 0 0 1 1
0 0 1 1 2
0 1 0 1 3
0 1 1 1 4
1 0 0 1 5
1 0 1 1 6
1 1 0 1 7
1 1 1 1 8
Logic “0” = V
AL
v 0.8 V
Logic
0
=
V
AL
v
0
.
8
V
Logic “1” = V
AH
w 2.4 V
Logic 1 V
AH
w 2.4 V
X = Don’t Care
12
DG509A_MIL
Key
V–
NC
V+
D
b
S
1a
S
4b
S
1b
S
4a
NC
D
a
NC
NC
S
2a
A
1
S
2b
GND
S
3a
EN
S
3b
A
0
91011 13
4
5
6
7
8
1231920
14
15
16
17
18
Top View
LCC
Decoders/Drivers
A
0
D
a
S
2b
A
1
S
3a
D
b
S
3b
EN
S
4a
S
4b
Dual-In-Line and SOIC
GND
V– V+
S
1a
S
1b
S
2a
Decoders/Drivers
1
2
3
4
5
6
7
16
15
14
13
12
11
10
Top View
89
DG509A_MIL
ORDERING INFORMATION - DG509A_MIL
Temp Range Package Part Number
55 125 C
16
-
Pin CerDIP
DG509AAK
55 125 C
16
-
Pin
CerDIP
DG509AAK/883
–55 to 125_C LCC-20 DG509AAZ/883
16
-
Pin Sidebraze
JM38510/19008BEA
16
-
Pin
Sidebraze
JM38510/19008BEC
TRUTH TABLE - DG509A_MIL
A
1
A
0
EN On Switch
X X 0 None
0 0 1 1
0 1 1 2
1 0 1 3
1 1 1 4
Logic “0” = V
AL
v 0.8 V
Logic
0
=
V
AL
v
0
.
8
V
Logic “1” = V
AH
w 2.4 V
Logic 1 V
AH
w 2.4 V
X = Don’t Care
DG508A_MIL/509A_MIL
Vishay Siliconix
Document Number: 70067
S-00405—Rev. C, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-3
ABSOLUTE MAXIMUM RATINGS
Voltage Referenced to V–
V+ 44 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
GND 25 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputs
a
, V
S
, V
D
(V–) –2 V to (V+) +2 V or. . . . . . . . . . . . . . . . . . . . . . . .
20 mA, whichever occurs first
Current (Any Terminal, Except S or D) 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous Current, S or D 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) 40 mA. . . . . . . . . . . . . . . . . . . . . . . . .
Storage Temperature (K Suffix) –65 to 150_C. . . . . . . . . . . . . . . . . . .
(J and Y Suffix) –65 to 125_C. . . . . . . . . . . . . .
Power Dissipation (Package)
b
16-Pin CerDIP
c
900 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LCC-20
c
900 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes:
a. Signals on S
X
, D
X
or IN
X
exceeding V+ or V– will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 12 mW/_C above 75_C.
SPECIFICATIONS
a
P
Sbl
Test Conditions
Unless Otherwise Specified
T
b
A Suffix
–55 to 125_C
Ui
Parameter Symbol
V+ = 15 V, V– = –15 V
V
IN
= 2.4 V, 0.8 V
f
Temp
b
Min
d
Typ
c
Max
d
Unit
Analog Switch
Analog Signal Range
e
V
ANALOG
Full –15 15 V
Drain-Source
On-Resistance
r
DS(on)
V
D
= "10 V, I
S
= –200 mA
Room
Full
240 400
500
W
r
DS(on)
Match Dr
DS(on)
–10 V < V
S
< 10 V Room 6 %
Source Off
Leakage Current
I
S(off)
V
EN
= 0 V, V
S
= "10 V
V
D
= #10 V
Room
Full
–1
–50
1
50
A
Drain Off
Lk C t
I
D(off)
V
EN
= 0 V
V
D
=
"10 V
DG508A_MIL
Room
Full
–10
–200
10
200
A
Leakage Current
I
D(off)
V
D
=
"10
V
V
S
= #10 V
DG509A_MIL
Room
Full
–10
–100
10
100
nA
Drain On
Lk C t
I
D(on)
V
S
=
V
D
=
"10 V
DG508A_MIL
Room
Full
–10
–200
10
200
Leakage Current
I
D(on)
V
S
=
V
D
=
"10
V
DG509A_MIL
Room
Full
–10
–100
10
100
Digital Control
Logic Input Current
ItVlt Hih
I
AH
V
A
= 2.4 V
Room
Full
–10
–30
–0.002
A
gp
Input Voltage High
I
AH
V
A
= 15 V
Room
Full
0.006
10
30
mA
Logic Input Current
Input Voltage Low
I
AL
V
EN
= 0 V, 2.4 V, V
A
= 0 V
Room
Full
–10
–30
–0.002
Dynamic Characteristics
Transition Time t
TRANS
See Figure 2 Room 0.6 1.0
Break-Before-Make Time t
OPEN
See Figure 4 Room 0.2
ms
Enable Turn-On Time t
ON(EN)
Room 1 1.5
m
s
Enable Turn-Off Time t
OFF(EN)
Room 0.4 1.0
Charge Injection Q See Figure 5 Room 6 pC
Off Isolation OIRR
V
EN
= 0 V, R
L
= 1 kW , C
L
= 15 pF
V
S
= 7 V
RMS
, f = 500 kHz
Room 68 dB
Logic Input Capacitance C
in
f = 1 MHz Room 8
F
Source Off Capacitance C
S(off)
V
EN
= 0 V, V
S
= 0 V, f = 140 kHz Room 6
pF
Drain Off Capacitance
C
D(off)
V
EN
= 0 V, V
D
= 0 V
f 140 kH
DG508A_MIL Room 25
pF
Drain
Off
Capacitance
C
D(off)
EN
,
D
f = 140 kHz
DG509A_MIL Room 12
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