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74HC175M

Part # 74HC175M
Description
Category IC
Availability Out of Stock
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

M54HC175
M74HC175
October 1992
QUAD D-TYPE FLIP-FLOP WITH CLEAR
B1R
(Plastic Package)
ORDER CODES :
M54HC175F1R M74HC175M1R
M74HC175B1R M74HC175C1R
F1R
(CeramicPackage)
M1R
(Micro Package)
C1R
(Chip Carrier)
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
DESCRIPTION
.HIGH SPEED
t
PD
= 13 ns (TYP.) AT V
CC
=5V
.LOW POWER DISSIPATION
I
CC
=4µA (MAX.) AT T
A
=25°C
.HIGH NOISE IMMUNITY
V
NIH
=V
NIL
=28%V
CC
(MIN.)
.OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
|=I
OL
= 4 mA (MIN.)
.BALANCEDPROPAGATION DELAYS
t
PLH
=t
PHL
.WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
.PIN AND FUNCTION COMPATIBLE
WITH 54/74LS175
The M54/74HC175is ahigh speedCMOSQUADD-
TYPE FLIP-FLOP WITH CLEAR fabricated in sili-
con gate CMOS technology. It has the same high
speed performance of LSTTL combined with true
CMOS low power consumption.
These four flip-flops are controlled by a clock input
(CLOCK) and a clear input (CLEAR). The informa-
tion dataapplied to the D inputs(1D to4D)are trans-
fered to the outputs (1Q to 4Q and 1Q to 4Q) on the
positive-going edge of the clock pulse. The reset
function is accomplished when the clear input is
taken low and all Q outputs are kept low regardless
of other input conditions. All inputs are equipped
with protection circuits against static discharge and
transient excess voltage.
1/11
INPUT AND OUTPUT EQUIVALENT CIRCUIT
TRUTH TABLE
INPUTS OUTPUS
FUNCTION
CLEAR D CLOCK Q Q
LXXLH
HL LH
HH HL
H X Qn Qn NO CHANGE
X:Don’t Care
LOGIC DIAGRAM
M54/M74HC175
2/11
PIN DESCRIPTION
PIN No SYMBOL NAME AND FUNCTION
1 CLEAR Master Reset Input
(Active LOW)
2, 7, 10, 15 1Q to 4 Q Flip Flop Outputs
3, 6, 11, 14 1Q to 4 Q Complementary Flip Flop
Outputs
4, 5, 12, 13 1D to 4D Data Inputs
9 CLOCK Clock Input (LOW to
HIGH, Edge-triggered)
8 GND Ground (0V)
16 V
CC
Positive Supply Voltage
IEC LOGIC SYMBOL
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
Supply Voltage -0.5 to +7 V
V
I
DC Input Voltage -0.5 to V
CC
+ 0.5 V
V
O
DC Output Voltage -0.5 to V
CC
+ 0.5 V
I
IK
DC Input Diode Current ± 20 mA
I
OK
DC Output Diode Current ± 20 mA
I
O
DC Output Source Sink Current Per Output Pin ± 25 mA
I
CC
or I
GND
DC V
CC
or Ground Current ± 50 mA
P
D
Power Dissipation 500 (*) mW
T
stg
Storage Temperature -65 to +150
o
C
T
L
Lead Temperature (10 sec) 300
o
C
Absolute MaximumRatingsare those values beyond whichdamage tothe device mayoccur. Functional operation under these conditionisnotimplied.
(*) 500 mW: 65
o
C derate to 300 mW by 10mW/
o
C: 65
o
Cto85
o
C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Value Unit
V
CC
Supply Voltage 2 to 6 V
V
I
Input Voltage 0 to V
CC
V
V
O
Output Voltage 0 to V
CC
V
T
op
Operating Temperature: M54HC Series
M74HC Series
-55 to +125
-40 to +85
o
C
o
C
t
r
,t
f
Input Rise and Fall Time V
CC
= 2 V 0 to 1000 ns
V
CC
= 4.5 V 0 to 500
V
CC
= 6 V 0 to 400
M54/M74HC175
3/11
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