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74FCT543AP

Part # 74FCT543AP
Description
Category IC
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Qty 8
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Integrated Device Technology
Date Code: 9036
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES MAY 1992
1992 Integrated Device Technology, Inc. 7.17 DSC-4602/3
FAST CMOS
OCTAL LATCHED
TRANSCEIVER
FEATURES:
IDT54/74FCT543 equivalent to FAST speed
IDT54/74FCT543A 25% faster than FAST
• IDT54/74FCT543C 40% faster than FAST
Equivalent to FAST output drive over full temperature
and voltage supply extremes
•IOL = 64mA (commercial), 48mA (military)
Separate controls for data flow in each direction
Back-to-back latches for storage
CMOS power levels (1mW typ. static)
Substantially lower input current levels than FAST
(5µA max.)
TTL input and output level compatible
CMOS output level compatible
Product available in Radiation Tolerant and Radiation
Enhanced versions
Military product compliant to MIL-STD-883, Class B
DESCRIPTION:
The IDT54/74FCT543/A/C is a non-inverting octal trans-
ceiver built using an advanced dual metal CMOS technology.
These devices contain two sets of eight D-type latches with
separate input and output controls for each set. For data flow
from A to B, for example, the A-to-B Enable ( ) input must
be LOW in order to enter data from A0–A7 or to take data from
B0–B7, as indicated in the Function Table. With LOW,
a LOW signal on the A-to-B Latch Enable ( ) input makes
the A-to-B latches transparent; a subsequent LOW-to-HIGH
transition of the signal puts the A latches in the storage
mode and their outputs no longer change with the A inputs.
With and both LOW, the 3-state B output buffers
are active and reflect the data present at the output of the A
latches. Control of data from B to A is similar, but uses the
, and inputs.
FUNCTIONAL BLOCK DIAGRAMS
A1
2614 drw 01
Q
OEBA
A2
A3
A4
A5
A6
A7
B1
B2
B3
B4
B5
B6
B7
CEBA
LEBA
OEAB
CEAB
LEAB
DETAIL A x 7
D
LE
Q
D
LE
DETAIL A
A0
B0
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
FAST is a registered trademark of National Semiconductor Co.
IDT54/74FCT543
IDT54/74FCT543A
IDT54/74FCT543C
1
7.17 2
IDT54/74FCT543/A/C
FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
IDT54/74FCT861 10-BIT TRANSCEIVERS
PIN DESCRIPTION
Pin Names Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A
0–A7 A-to-B Data Inputs or B-to-A 3-State Outputs
B
0–B7 B-to-A Data Inputs or A-to-B 3-State Outputs
2614 tbl 02
FUNCTION TABLE
(1,2)
For A-to-B (Symmetric with B-to-A)
Latch Output
Inputs Status Buffers
A-to-B B
0–B7
H Storing High Z
H Storing
H High Z
L L L Transparent Current A Inputs
L H L Storing Previous* A Inputs
LOGIC SYMBOL
A1
2614 drw 03
A2
A3
A4
A5
A6
A7
OEBA
A
0
B1
B2
B3
B4
B5
B6
B7
B0
OEAB
LEAB CEAB CEBA LEBA
LCC
TOP VIEW
NOTES: 2614 tbl 01
1. * Before LOW-to-HIGH Transition
H = HIGH Voltage Level
L = LOW Voltage Level
— = Don’t Care or Irrelevant
2. A-to-B data flow shown; B-to-A flow control is the same, except using
, and .
DIP/SOIC/CERPACK
TOP VIEW
2614 drw 02
5
6
7
8
9
10
11
L28-1
25
24
23
22
21
20
19
INDEX
A1
A2
A3
A4
A5
A6
NC
Vcc
GND
NC
NC
NC
B
1
B2
B3
B4
B5
B6
A
0
LEBA
OEBA
B0
CEBA
A7
CEAB
B
7
LEAB
OEAB
12 13 14 15 16 17 18
432
1
28 27 26
5
6
7
8
9
10
11
12
GND
A
0
A1
A2
1
2
3
4
24
23
22
21
20
19
18
17
Vcc
16
15
14
13
P24-1,
D24-1,
SO24-2
&
E24-1
B
0
A3
A4
A5
A
6
A7
B1
B2
B3
B4
B5
B6
B7
LEAB
OEAB
LEBA
OEBA
CEAB
CEBA
IDT54/74FCT543/A/C
FAST CMOS OCTAL LATCHED TRANSCEIVER MILITARY AND COMMERCIAL TEMPERATURE RANGES
7.17 3
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V, VHC = VCC – 0.2V
Commercial: TA = 0°C to +70°C, VCC = 5.0V ± 5%; Military: TA = –55°C to +125°C, VCC = 5.0V ± 10%
Symbol Parameter Test Conditions
(1)
Min. Typ.
(2)
Max. Unit
V
IH Input HIGH Level Guaranteed Logic HIGH Level 2.0 V
V
IL Input LOW Level Guaranteed Logic LOW Level 0.8 V
I
IH Input HIGH Current VCC = Max. VI = VCC ——5µA
(Except I/O pins) V
I = 2.7V 5
(4)
IIL Input LOW Current VI = 0.5V ——5
(4)
µA
(Except I/O pins) V
I = GND –5
I
IH Input HIGH Current VCC = Max. VI = VCC ——15µA
(I/O pins Only) V
I = 2.7V 15
(4)
IIL Input LOW Current VI = 0.5V –15
(4)
µA
(I/O pins Only) V
I = GND –15
V
IK Clamp Diode Voltage VCC = Min., IN = –18mA –0.7 –1.2 V
I
OS Short Circuit Current VCC = Max.
(3)
, VO = GND –60 –120 mA
V
OH Output HIGH Voltage VCC = 3V, VIN = VLC or VHC, IOH = –32µAVHC VCC —V
V
CC = Min. IOH = –300µAVHC
(4)
VCC
V
IN = VIH or VIL IOH = –12mA MIL. 2.4 4.3
I
OH = –15mA COM’L. 2.4 4.3
V
OL Output LOW Voltage VCC = 3V, VIN = VLC or VHC, IOL = 300µA GND VLC V
V
CC = Min. IOL = 300µA GND VLC
(4)
VIN = VIH or VIL IOL = 48mA MIL.
(5)
0.3 0.55
I
OL = 64mA COM’L.
(5)
0.3 0.55
NOTES: 2614 tbl 05
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. These are maximum IOL values per output, for 8 outputs turned on simultaneously. Total maximum IOL (all outputs) is 512mA for commercial and 384mA
for military. Derate I
OL for number of outputs exceeding 8 turned on simultaneously.
CAPACITANCE (TA = +25°C, f = 1.0MHz)
Symbol Parameter
(1)
Conditions Typ. Max. Unit
C
IN Input Capacitance VIN = 0V 6 10 pF
C
I/O I/O Capacitance VOUT = 0V 8 12 pF
NOTE: 2614 tbl 04
1. This parameter is guaranteed by characterization data and not tested.
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol Rating Commercial Military Unit
V
TERM
(2)
Terminal Voltage –0.5 to +7.0 –0.5 to +7.0 V
with Respect
to GND
V
TERM
(3)
Terminal Voltage –0.5 to VCC –0.5 to VCC V
with Respect
to GND
T
A Operating 0 to +70 –55 to +125 °C
Temperature
T
BIAS Temperature –55 to +125 –65 to +135 °C
Under Bias
T
STG Storage –55 to +125 –65 to +150 °C
Temperature
P
T Power Dissipation 0.5 0.5 W
I
OUT DC Output Current 120 120 mA
NOTES: 2614 tbl 03
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability. No terminal voltage
may exceed V
CC by +0.5V unless otherwise noted.
2. Inputs and V
CC terminals only.
3. Outputs and I/O terminals only.
123NEXT