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74FCT240M

Part # 74FCT240M
Description
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

CD74FCT240
BiCMOS OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCBS729 − JULY 2000
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D BiCMOS Technology With Low Quiescent
Power
D Buffered Inputs
D Inverted Outputs
D Input/Output Isolation From V
CC
D Controlled Output Edge Rates
D 64-mA Output Sink Current
D Output Voltage Swing Limited to 3.7 V
D SCR Latch-Up-Resistant BiCMOS Process
and Circuit Design
D Package Options Include Plastic
Small-Outline (M) and Shrink Small-Outline
(SM) Packages and Standard Plastic (E) DIP
description
The CD74FCT240 is an octal buffer/line driver with 3-state outputs, using a small-geometry BiCMOS
technology. The output stages are a combination of bipolar and CMOS transistors that limit the output high level
to two diode drops below V
CC
. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing
[a source of electromagnetic interference (EMI)] and minimizes V
CC
bounce and ground bounce and their
effects during simultaneous output switching. The output configuration also enhances switching speed and is
capable of sinking 64 mA.
The CD74FCT240 is organized as two 4-bit buffers/line drivers with separate active-low output-enable (OE
)
inputs. When OE
is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs
are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE
should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The CD74FCT240 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each buffer/driver)
INPUTS
OUTPUT
OE A
OUTPUT
Y
L H L
L LH
H X Z
Copyright © 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
E, M, OR SM PACKAGE
(TOP VIEW)
CD74FCT240
BiCMOS OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCBS729 − JULY 2000
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol
†
2
1A1
4
1A2
6
1A3
8
1A4
EN
1
1Y1
18
1Y2
16
1Y3
14
1Y4
12
11
2A1
13
2A2
15
2A3
17
2A4
2Y1
9
2Y2
7
2Y3
5
2Y4
3
1OE
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2OE
EN
19
logic diagram (positive logic)
1
218
1Y1
1OE
1A1
416
1Y2
1A2
614
1Y3
1A3
812
1Y4
1A4
19
11 9
2Y1
2OE
2A1
13 7
2Y2
2A2
15 5
2Y3
2A3
17 3
2Y4
2A4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
DC supply voltage range, V
CC
−0.5 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC input clamp current, I
IK
(V
I
< −0.5 V) −20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output clamp current, I
OK
(V
O
< −0.5 V) −50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output sink current per output pin, I
OL
70 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DC output source current per output pin, I
OH
−30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through V
CC
, I
CC
140 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through GND 528 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θ
JA
(see Note 1): E package 69°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M package 58°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SM package 70°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
−65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The package thermal impedance is calculated in accordance with JESD 51.
CD74FCT240
BiCMOS OCTAL BUFFER/LINE DRIVER
WITH 3-STATE OUTPUTS
SCBS729 − JULY 2000
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
recommended operating conditions (see Note 2)
MIN MAX UNIT
V
CC
Supply voltage 4.75 5.25 V
V
IH
High-level input voltage 2 V
V
IL
Low-level input voltage 0.8 V
V
I
Input voltage 0 V
CC
V
V
O
Output voltage 0 V
CC
V
I
OH
High-level output current −15 mA
I
OL
Low-level output current 64 mA
Δt/Δv Input transition rise or fall rate (slew rate) 0 10 ns/V
T
A
Operating free-air temperature 0 70 °C
NOTE 2: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
V
T
A
= 25°C
MIN
MAX
UNIT
PARAMETER TEST CONDITIONS V
CC
MIN MAX
MIN MAX UNIT
V
IK
I
I
= −18 mA 4.75 V −1.2 −1.2 V
V
OH
I
OH
= −15 mA 4.75 V 2.4 2.4 V
V
OL
I
OL
= 64 mA 4.75 V 0.55 0.55 V
I
I
V
I
= V
CC
or GND 5.25 V ±0.1 ±1 mA
I
OZ
V
O
= V
CC
or GND 5.25 V ±0.5 ±10 mA
I
OS
†
V
I
= V
CC
or GND, V
O
= 0 5.25 V −60 −60 mA
I
CC
V
I
= V
CC
or GND, I
O
= 0 5.25 V 8 80 mA
ΔI
CC
‡
One input at 3.4 V,
Other inputs at V
CC
or GND
5.25 V 1.6 1.6 mA
C
i
V
I
= V
CC
or GND 10 10 pF
C
o
V
O
= V
CC
or GND 15 15 pF
†
Not more than one output should be tested at a time, and the duration of the test should not exceed 100 ms.
‡
This is the increase in supply current for each input at one of the specified TTL voltage levels rather than 0 V or V
CC
.
switching characteristics over recommended operating free-air temperature range,
V
CC
= 5 V ± 0.25 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM TO
T
A
= 25°C
MIN
MAX
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TYP
MIN MAX UNIT
t
pd
A
Y
5 1.5 8 ns
t
en
OE Y
7 1.5 10 ns
t
dis
OE Y
6 1.5 9.5 ns
noise characteristics, V
CC
= 5 V, C
L
= 50 pF, T
A
= 25°C
PARAMETER MIN TYP MAX UNIT
V
OL(P)
Quiet output, maximum dynamic V
OL
1 V
V
OH(V)
Quiet output, minimum dynamic V
OH
0.5 V
V
IH(D)
High-level dynamic input voltage 2 V
V
IL(D)
Low-level dynamic input voltage 0.8 V
1234NEXT
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