Philips Semiconductors Product specification
74F5798-bit bidirectional binary counter (3-State)
2
1992 May 04 853-0377 06639
FEATURES
• Fully synchronous operation
• Multiplexed 3-State I/O ports for bus oriented applications
• Built in cascading carry capability
• U/D pin to control direction of counting
• Separate pins for Master reset and Synchronous operation
• Center power pins to reduce effects of package inductance
• Count frequency 115MHz Typ
• Supply current 100mA Typ
• See 74F269 for 24-pin separate I/O port version
• See 74F779 for 16-pin version
DESCRIPTION
The 74F579 is a fully synchronous 8-stage Up/Down Counter with
multiplexed 3-State I/O ports for bus-oriented applications. It
features a preset capability for programmable operation, carry
look-ahead for easy cascading and a U/D
input to control the
direction of counting. All state changes, except for the case of
asynchronous reset, are initiated by the rising edge of the clock.
TC
output is not recommended for use as a clock or asynchronous
reset due to the possibility of decoding spikes.
PIN CONFIGURATION
20
19
18
17
16
15
14
13
12
10 11
9
8
7
6
5
4
3
2
1
CP
I/O0
I/O1
I/O2
I/O3
GND
I/O4
I/O5
I/O6
I/O7
VCC
MR
SR
CEP
CET
TC
PE
CS
OE
U/D
SF01085
ORDERING INFORMATION
TYPE TYPICAL f
MAX
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F579 115MHz 100mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V ±10%,
T
amb
= 0°C to +70°C
PKG DWG #
20-Pin Plastic DIP N74F579N SOT146-1
20-Pin Plastic SOL N74F579D SOT163-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
Data Inputs 3.5/1.0 70µA/0.6mA
n
Data Outputs 150/40 3.0mA/24mA
PE Parallel Enable input (active Low) 1.0/1.0 20µA/0.6mA
U/D Up/Down count control input 1.0/1.0 20µA/0.6mA
MR Master Reset input (active Low) 1.0/1.0 20µA/0.6mA
SR Synchronous Reset input (active Low) 1.0/1.0 20µA/0.6mA
CEP Count Enable Parallel input (active Low) 1.0/1.0 20µA/0.6mA
CET Count Enable Trickle input (active Low) 1.0/1.0 20µA/0.6mA
CS Chip Select input (active Low) 1.0/1.0 20µA/0.6mA
OE Output Enable input (active Low) 1.0/1.0 20µA/0.6mA
CP Clock input (active Rising Edge) 1.0/1.0 20µA/0.6mA
TC Terminal Count Output (active Low) 50/33 1.0mA/20mA
NOTE: One (1.0) FAST Unit Load (U.L.) is defined as: 20µA in the High state and 0.6mA in the Low state.
