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74ACT541P

Part # 74ACT541P
Description
Category IC
Availability In Stock
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Date Code: 9800
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

© 2005 Fairchild Semiconductor Corporation DS009967 www.fairchildsemi.com
November 1988
Revised March 2005
74AC541 • 74ACT541 Octal Buffer/Line Driver with 3-STATE Outputs
74AC541 • 74ACT541
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The 74AC541 and 74ACT541 are octal buffer/line drivers
designed to be employed as memory and address drivers,
clock drivers and bus oriented transmitter/receivers.
These devices are similar in function to the 74AC244 and
74ACTC244 while providing flow-through architecture
(inputs on opposite side from outputs). This pinout arrange-
ment makes these devices especially useful as an output
port for microprocessors, allowing ease of layout and
greater PC board density.
Features
■ I
CC
and I
OZ
reduced by 50%
■ 3-STATE outputs
■ Inputs and outputs opposite side of package, allowing
easier interface to microprocessors
■ Output source/sink 24 mA
■ 74AC541 is a non-inverting option of the 74AC540
■ 74ACT541 has TTL-compatible inputs
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Pb-Free package per JEDED J-STD-020B.
Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
FACT
is a trademark of Fairchild Semiconductor Corporation.
Order Number
Package
Package Description
Number
74AC541SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74AC541SJ M20D Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74AC541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74AC541MTCX_NL
(Note 1)
MTC20 Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74AC541PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
74ACT541SC M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74ACT541MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
74ACT541MTCX_NL
(Note 1)
MTC20 Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
74ACT541PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
www.fairchildsemi.com 2
74AC541 • 74ACT541
Logic Symbol
IEEE/IEC
Connection Diagram
Truth Table
H HIGH Voltage Level X Immaterial L LOW Voltage Level Z High Impedance
Inputs Outputs
OE
1
OE
2
I
L L HH
H X X Z
X H X Z
L L LL
3 www.fairchildsemi.com
74AC541 • 74ACT541
Absolute Maximum Ratings(Note 2) Recommended Operating
Conditions
Note 2: Absolute maximum ratings are those values beyond which dam-
age to the device may occur. The databook specifications should be met,
without exception, to ensure that the system design is reliable over its
power supply, temperature, and output/input loading variables. Fairchild
does not recommend operation of FACT
circuits outside databook specifi-
cations.
DC Electrical Characteristics for AC
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: I
IN
and I
CC
@ 3.0V are guaranteed to be less than or equal to the respective limit @ 5.5V V
CC
.
Supply Voltage (V
CC
) 0.5V to 7.0V
DC Input Diode Current (I
IK
)
V
I
0.5V 20 mA
V
I
V
CC
0.5V 20 mA
DC Input Voltage (V
I
) 0.5V to V
CC
0.5V
DC Output Diode Current (I
OK
)
V
O
0.5V 20 mA
V
O
V
CC
0.5V 20 mA
DC Output Voltage (V
O
) 0.5V to V
CC
0.5V
DC Output Source
or Sink Current (I
O
) 50 mA
DC V
CC
or Ground Current
per Output Pin (I
CC
or I
GND
) 50 mA
Storage Temperature (T
STG
) 65 C to 150 C
Junction Temperature (T
J
)
PDIP 140
C
Supply Voltage (V
CC
)
AC 2.0V to 6.0V
ACT 4.5V to 5.5V
Input Voltage (V
I
) 0V to V
CC
Output Voltage (V
O
) 0V to V
CC
Operating Temperature (T
A
) 40 C to 85 C
Minimum Input Edge Rate (
V/ t) 125 mV/ns
AC: V
IN
from 30% to 70% of V
CC
V
CC
@ 3.3V, 4.5V, 5.5V
ACT:V
IN
from 0.8V to 2.0V
V
CC
@ 4.5V, 5.5V
Symbol Parameter
V
CC
T
A
25 CT
A
40 C to 85 C
Units Conditions
(V) Typ Guaranteed Limits
V
IH
Minimum HIGH Level 3.0 1.5 2.1 2.1
V
V
OUT
0.1V
Input Voltage 4.5 2.25 3.15 3.15 or V
CC
0.1V
5.5 2.75 3.85 3.85
V
IL
Maximum LOW Level 3.0 1.5 0.9 0.9
V
V
OUT
0.1V
Input Voltage 4.5 2.25 1.35 1.35 or V
CC
0.1V
5.5 2.75 1.65 1.65
V
OH
Minimum HIGH Level 3.0 2.99 2.9 2.9
VOutput Voltage 4.5 4.49 4.4 4.4 I
OUT
50 A
5.55.495.4 5.4
V
V
IN
V
IL
or V
IH
3.0 2.56 2.46 I
OH
12 mA
4.5 3.86 3.76 I
OH
24 mA
5.5 4.86 4.76 I
OH
24 mA (Note 3)
V
OL
Maximum LOW Level 3.0 0.002 0.1 0.1
V
Output Voltage 4.5 0.001 0.1 0.1 I
OUT
50 A
5.5 0.001 0.1 0.1
V
V
IN
V
IL
or V
IH
3.0 0.36 0.44 I
OL
12 mA
4.5 0.36 0.44 I
OL
24 mA
5.5 0.36 0.44 I
OL
24 mA (Note 3)
I
IN
(Note 5) Maximum Input Leakage Current 5.5 0.1 1.0 A V
I
V
CC
, GND
I
OZ
Maximum 3-STATE
A
V
I
(OE) V
IL
, V
IH
Leakage Current 5.5 0.25 2.5 V
I
V
CC
, GND
V
O
V
CC
, GND
I
OLD
Minimum Dynamic 5.5 75 mA V
OLD
1.65V Max
I
OHD
Output Current (Note 4) 5.5 75 mA V
OHD
3.85V Min
I
CC
(Note 5) Maximum Quiescent Supply Current 5.5 4.0 40.0 AV
IN
V
CC
or GND
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