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7404N

Part # 7404N
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

  
  
 
SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
recommended operating conditions (see Note 3)
SN54S04
SN74S04
SN54S04
SN74S04
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
V
CC
Supply voltage 4.5 5 5.5 4.75 5 5.25 V
V
IH
High-level input voltage 2 2 V
V
IL
Low-level input voltage 0.8 0.8 V
I
OH
High-level output current −1 −1 mA
I
OL
Low-level output current 20 20 mA
T
A
Operating free-air temperature −55 125 0 70 °C
NOTE 3: All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
SN54S04 SN74S04
UNIT
PARAMETER
TEST CONDITIONS
MIN TYP
MAX MIN TYP
MAX
UNIT
V
IK
V
CC
= MIN, I
I
= −18 mA 1.2 1.2 V
V
OH
V
CC
= MIN, V
IL
= 0.8 V, I
OH
= −1 mA 2.5 3.4 2.7 3.4 V
V
OL
V
CC
= MIN, V
IH
= 2 V, I
OL
= 20 mA 0.5 0.5 V
I
I
V
CC
= MAX, V
I
= 5.5 V 1 1 mA
I
IH
V
CC
= MAX, V
I
= 2.7 V 50 50 µA
I
IL
V
CC
= MAX, V
I
= 0.5 V −2 −2 mA
I
OS
§
V
CC
= MAX −40 −100 −40 −100 mA
I
CCH
V
CC
= MAX, V
I
= 0 V 15 24 15 24 mA
I
CCL
V
CC
= MAX, V
I
= 4.5 V 30 54 30 54 mA
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V
CC
= 5 V, T
A
= 25°C.
§
Not more than one output should be shorted at a time, and the duration of the short-circuit should not exceed one second.
switching characteristics, V
CC
= 5 V, T
A
= 25°C (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
TEST CONDITIONS
SN54S04
SN74S04
UNIT
PARAMETER
(INPUT)
(OUTPUT)
TEST CONDITIONS
MIN TYP MAX
UNIT
t
PLH
A
Y
R
L
= 280 ,
C
L
= 15 pF
3 4.5
ns
t
PHL
A
Y
R
L
= 280
,
C
L
= 15 pF
3 5
ns
t
PLH
A
Y
R
L
= 280 ,
C
L
= 50 pF
4.5
ns
t
PHL
A
Y
R
L
= 280
,
C
L
= 50 pF
5
ns
  
  
 
SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54/74 AND 54S/74S DEVICES
t
PHL
t
PLH
t
PLH
t
PHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
High-Level
Pulse
Low-Level
Pulse
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note D)
3 V
0 V
V
OL
V
OH
V
OH
V
OL
In-Phase
Output
(see Note D)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
V
CC
R
L
Test
Point
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
(see Note B)
V
CC
R
L
From Output
Under Test
C
L
(see Note A)
Test
Point
(see Note B
)
V
CC
R
L
From Output
Under Test
C
L
(see Note A)
Test
Point
1 k
NOTES: A. C
L
includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
D. S1 and S2 are closed for t
PLH
, t
PHL
, t
PHZ
, and t
PLZ
; S1 is open and S2 is closed for t
PZH
; S1 is closed and S2 is open for t
PZL
.
E. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z
O
50 ; t
r
and t
f
7 ns for Serie
s
54/74 devices and t
r
and t
f
2.5 ns for Series 54S/74S devices.
F. The outputs are measured one at a time, with one input transition per measurement.
S1
S2
t
PHZ
t
PLZ
t
PZL
t
PZH
3 V
3 V
0 V
0 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
3 V
0 V
Output
Control
(low-level
enabling)
Waveform 1
(see Notes C
and D)
Waveform 2
(see Notes C
and D)
1.5 V
V
OH
− 0.5 V
V
OL
+ 0.5 V
1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V
1.5 V
t
w
1.5 V 1.5 V
1.5 V 1.5 V
1.5 V 1.5 V
V
OH
V
OL
Figure 1. Load Circuits and Voltage Waveforms
  
  
 
SDLS029C − DECEMBER 1983 − REVISED JANUARY 2004
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
SERIES 54LS/74LS DEVICES
t
PHL
t
PLH
t
PLH
t
PHL
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
High-Level
Pulse
Low-Level
Pulse
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
Out-of-Phase
Output
(see Note D)
3 V
0 V
V
OL
V
OH
V
OH
V
OL
In-Phase
Output
(see Note D)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
V
CC
R
L
Test
Point
From Output
Under Test
C
L
(see Note A)
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 2-STATE TOTEM-POLE OUTPUTS
(see Note B)
V
CC
R
L
From Output
Under Test
C
L
(see Note A)
Test
Point
(see Note B
)
V
CC
R
L
From Output
Under Test
C
L
(see Note A)
Test
Point
5 k
NOTES: A. C
L
includes probe and jig capacitance.
B. All diodes are 1N3064 or equivalent.
C. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
D. S1 and S2 are closed for t
PLH
, t
PHL
, t
PHZ
, and t
PLZ
; S1 is open and S2 is closed for t
PZH
; S1 is closed and S2 is open for t
PZL
.
E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples.
F. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z
O
50 , t
r
1.5 ns, t
f
2.6 ns
.
G. The outputs are measured one at a time, with one input transition per measurement.
S1
S2
t
PHZ
t
PLZ
t
PZL
t
PZH
3 V
3 V
0 V
0 V
t
h
t
su
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Timing
Input
Data
Input
3 V
0 V
Output
Control
(low-level
enabling)
Waveform 1
(see Notes C
and D)
Waveform 2
(see Notes C
and D)
1.5 V
V
OH
− 0.5 V
V
OL
+ 0.5 V
1.5 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V
1.3 V
t
w
1.3 V 1.3 V
1.3 V 1.3 V
1.3 V 1.3 V
V
OL
V
OH
Figure 2. Load Circuits and Voltage Waveforms
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