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5962F9861301VXC

Part # 5962F9861301VXC
Description Comparator Quad 30V 14-Pin CFPAK
Category IC
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1
®
FN3573.4
HS-139RH
Radiation Hardened Quad Voltage
Comparator
The Radiation Hardened HS-139RH consists of four
independent single or dual supply voltage comparators on a
single monolithic substrate. The common mode input voltage
range includes ground, even when operated from a single
supply, and the low supply current makes these comparators
suitable for low power applications. These types were
designed to directly interface with TTL and CMOS.
The HS-139RH is fabricated on our dielectrically isolated
Rad Hard Silicon Gate (RSG) process, which provides an
immunity to Single Event Latch-up and the capability of
highly reliable performance in any radiation environment.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the HS-139RH are
contained in SMD 5962-98613. A “hot-link” is provided
on our homepage with instructions for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Features
QML Qualified Per MIL-PRF-38535 Requirements
Radiation Environment
- Latch-up Free Under any Conditions
- Total Dose (Max) . . . . . . . . . . . . . . . . . 3 x 10
5
RAD(Si)
- SEU LET Threshold . . . . . . . . . . . . . . . 20MeV/cm
2
/mg
- Low Dose Rate Effects Immunity
100V Output Voltage Withstand Capability
ESD Protection to >3000V
Differential Input Voltage Range Equal to the Supply
Voltage
Input Offset Voltage (V
IO
). . . . . . . . . . . . . . . . . 2mV (Max)
Quiescent Supply Current . . . . . . . . . . . . . . . . 2mA (Max)
Pb-Free (RoHS Compliant)
Applications
Pulse Generators
Timing Circuitry
Level Shifting
Analog to Digital Conversion
Ordering Information
ORDERING NUMBER
(Note)
INTERNAL
MKT. NUMBER
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PACKAGE
DRAWING NUMBER
5962F9861301VCC HS1-139RH-Q Q 5962F98 61301VCC -55 to +125 14 Ld SBDIP D14.3
5962F9861301QCC HS1-139RH-8 Q 5962F98 61301QCC -55 to +125 14 Ld SBDIP D14.3
HS1-139RH/PROTO HS1-139RH/PROTO HS1-139RH /PROTO -55 to +125 14 Ld SBDIP D14.3
5962F9861301VXC HS9-139RH-Q Q 5962F98 61301VXC -55 to +125 14 Ld FLATPACK K14.A
5962F9861301QXC HS9-139RH-8 Q 5962F98 61301QXC -55 to +125 14 Ld FLATPACK K14.A
HS9-139RH/PROTO HS9-139RH/PROTO HS9-139RH /PROTO -55 to +125 14 Ld FLATPACK K14.A
NOTE: These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible
with both SnPb and Pb-free soldering operations.
Data Sheet May 19, 2009
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 1999, 2004, 2008, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners
2
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN3573.4
May 19, 2009
Pinouts
s
HS-139RH
(SBDIP CDIP2-T14)
TOP VIEW
OUT 2
OUT 1
V+
- IN 1
+ IN 1
- IN 2
+ IN 2
OUT 3
OUT 4
GND
+ IN 4
- IN 4
+ IN 3
- IN 3
1
2
3
4
5
6
7
14
13
12
11
10
9
8
HS-139RH
(FLATPACK CDFP3-F14)
TOP VIEW
14
13
12
11
10
9
8
2
3
4
5
6
7
1OUT 2
OUT 1
V+
- IN 1
+ IN 1
- IN 2
+IN 2
OUT 3
OUT 4
GND
+ IN 4
- IN 4
+ IN 3
- IN 3
Die Characteristics
DIE DIMENSIONS:
3750µm x 2820µm (148 mils x 111 mils)
483µm ±25.4µm (19 mils ±1 mil)
INTERFACE MATERIALS:
Glassivation:
Type: Silox (SiO
2
)
Thickness: 8.0kÅ ±1.0kÅ
Top Metallization:
Type: AlSiCu
Thickness: 16.0kÅ ±2kÅ
Substrate:
Radiation Hardened Silicon Gate, Dielectric Isolation
Backside Finish:
Silicon
ASSEMBLY RELATED INFORMATION:
Substrate Potential:
Unbiased (DI)
ADDITIONAL INFORMATION:
Worst Case Current Density:
<2.0 x 10
5
A/cm
2
Transistor Count:
49
HS-139RH
3
FN3573.4
May 19, 2009
Metallization Mask Layout
HS-139RH
GND +IN4 -IN4
V+ -IN1 +IN1
+IN3
-IN3
+IN2
-IN2
OUT4
OUT3
OUT2
OUT1
(9)
(8)
(7)
(6)
(5)(4)(3)
(2)
(1)
(14)
(13)
(12) (11) (10)
TABLE 1. HS-139RH PAD COORDINATES
RELATIVE TO PIN 1
PIN NUMBER PAD NAME
X
COORDINATES
Y
COORDINATES
1 OUT 2 0 0
2 OUT 1 0 -535
3 V+ 1323 -688
4 -IN 1 1862 -670
5 +IN 1 2439 -670
6 -IN 2 3084 -299
7 +IN 2 3084 278
8 -IN 3 3084 518
9 +IN 3 3084 1095
10 -IN 4 2439 1466
11 +IN 4 1862 1466
12 GND 1550 1503
13 OUT 4 0 1331
14 OUT 3 0 796
NOTE: Dimensions in microns
HS-139RH