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PCF8582C-2

Part # PCF8582C-2
Description Serial-I2C 2K-bit 8-Pin DIP256 x 8 3.3V/5V
Category E-PROMS
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

DATA SHEET
Product specification
Supersedes data of February 1992
File under Integrated Circuits, IC12
December 1994
INTEGRATED CIRCUITS
Philips Semiconductors
PCX8582X-2 Family
256 x 8-bit CMOS EEPROMS
with I
2
C-bus interface
December 1994 2
Philips Semiconductors Product specification
256 x 8-bit CMOS EEPROMS
with I
2
C-bus interface
PCX8582X-2 Family
FEATURES
Low power CMOS
maximum active current 2.0 mA
maximum standby current 10 µA (at 6.0 V),
typical 4 µA
Non-volatile storage of 2-Kbits organized as 256 × 8-bits
Single supply with full operation down to 2.5 V
On-chip voltage multiplier
Serial input/output I
2
C-bus
Write operations
byte write mode
8-byte page write mode
(minimizes total write time per byte)
Read operations
sequential read
random read
Internal timer for writing (no external components)
Power-on reset
High reliability by using a redundant storage code
Endurance
>500 k E/W-cycles at T
amb
= 22 °C
40 years non-volatile data retention time (typ.)
Pin and address compatible to
PCX8570, PCF8571, PCF8572 and PCF8581
PCX8494X-2, PCX8598X-2 -Family.
DESCRIPTION
The PCX8582X-2 is a 2-Kbit (256 × 8-bit) floating gate
electrically erasable programmable read only memory
(EEPROM). By using an internal redundant storage code
it is fault tolerant to single bit errors. This feature
dramatically increases reliability compared to conventional
EEPROM memories.
Power consumption is low due to the full CMOS
technology used. The programming voltage is generated
on-chip, using a voltage multiplier.
As data bytes are received and transmitted via the serial
I
2
C-bus, a package using eight pins is sufficient. Up to
eight PCX8582X-2 devices may be connected to the
I
2
C-bus. Chip select is accomplished by three address
inputs (A0, A1, A2).
Timing of the ERASE/WRITE cycle is carried out
internally, thus no external components are required. Pin 7
(PTC) must be connected to either V
DD
or left open-circuit.
There is an option of using an external clock for timing the
length of an ERASE/WRITE cycle.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
V
DD
supply voltage 2.5 6.0 V
I
DDR
supply current READ f
SCL
= 100 kHz
V
DD
= 3 V 60 µA
V
DD
= 6 V 200 µA
I
DDW
supply current ERASE/WRITE f
SCL
= 100 kHz
V
DD
= 3 V 0.6 mA
V
DD
= 6 V 2.0 mA
I
DDSB
supply current STANDBY V
DD
= 3 V 3.5 µA
V
DD
= 6 V 10 µA
December 1994 3
Philips Semiconductors Product specification
256 x 8-bit CMOS EEPROMS
with I
2
C-bus interface
PCX8582X-2 Family
ORDERING INFORMATION
DEVICE SELECTION
Table 1 Device selection code
Note
1. The MSB b7 is sent first.
Table 2 Endurance and data retention guarantees
Note
1. At the time of publication of this data sheet the statistical history was not yet sufficient to guarantee 1000000000 E/W
cycle performance for these types.
TYPE
NUMBER
PACKAGE TEMPERATURE (°C) SUPPLY (V)
NAME DESCRIPTION VERSION MIN. MAX. MIN. MAX.
PCF8582C-2P DIP8 plastic dual in-line package;
8 leads (300 mil)
SOT97-1 40 +85 2.5 6.0
PCD8582D-2P 25 +70 3.0 6.0
PCF8582E-2P 40 +85 4.5 5.5
PCA8582F-2P 40 +125 4.5 5.5
PCF8582C-2T SO8 plastic small outline
package;
8 leads; body width 3.9 mm
SOT96-1 40 +85 2.5 6.0
PCD8582D-2T 25 +70 3.0 6.0
PCF8582E-2T 40 +85 4.5 5.5
PCA8582F-2T 40 +125 4.5 5.5
SELECTION DEVICE CODE CHIP ENABLE R/
W
Bit b71 b6 b5 b4 b3 b2 b1 b0
Device 1 0 1 0 A2 A1 A0 R/W
DEVICE ENDURANCE E/W CYCLES DATA RETENTION YEARS
PCF8582C-2; PCA8582F-2 500000
(1)
40
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