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DAC811BH

Part # DAC811BH
Description DAC 1-CH R-2R 12-bit 28-Pin SBCDIP Tube - Rail/Tube
Category CONVERTER
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Burr-Brown Corporation
Date Code: 9349
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

1
®
DAC811
DAC811
Microprocessor-Compatible
12-BIT DIGITAL-TO-ANALOG CONVERTER
®
© 1983 Burr-Brown Corporation PDS-503L Printed in U.S.A. April, 2000
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
For most current data sheet and other product
information, visit www.burr-brown.com
BPO
V
OUT
D/A Latch
Input Latch
4 MSBs
Input Latch Input Latch
4 LSBs
12-Bit D/A Converter
Voltage Reference
10V
R
F
S
J
R
F
R
BPO
DESCRIPTION
The DAC811 is a complete, single-chip integrated-
circuit, microprocessor-compatible, 12-bit digital-to-
analog converter. The chip combines a precision volt-
age reference, microcomputer interface logic, and
double-buffered latch, in a 12-bit D/A converter with
a voltage output amplifier. Fast current switches and a
laser-trimmed thin-film resistor network provide a
highly accurate and fast D/A converter.
Microcomputer interfacing is facilitated by a double-
buffered latch. The input latch is divided into three
4-bit nibbles to permit interfacing to 4-, 8-, 12-, or
16-bit buses and to handle right-or left-justified data.
The 12-bit data in the input latches is transferred to the
D/A latch to hold the output value.
Input gating logic is designed so that loading the last
nibble or byte of data can be accomplished simulta-
neously with the transfer of data (previously stored in
adjacent latches) from adjacent input latches to the
D/A latch. This feature avoids spurious analog output
values while using an interface technique that saves
computer instructions.
The DAC811 is laser trimmed at the wafer level and
is specified to ±1/4LSB maximum linearity error (B
and K grades) at 25°C and ±1/2LSB maximum over
the temperature range. All grades are guaranteed mono-
tonic over the specification temperature range.
The DAC811 is available in six performance grades
and three package types. DAC811J and K are speci-
fied over the temperature ranges of 0°C to +70°C;
DAC811A and B are specified over –25°C to +85°C;
DAC811J and K are packaged in a reliable 28-pin
plastic DIP or plastic SO package, while DAC811A
and B are available in a 28-pin 0.6" wide dual-inline
hermetically sealed ceramic side-brazed package (H
package).
FEATURES
SINGLE INTEGRATED CIRCUIT CHIP
MICROCOMPUTER INTERFACE:
Double-Buffered Latch
VOLTAGE OUTPUT: ±10V, ±5V, +10V
MONOTONICITY GUARANTEED OVER
TEMPERATURE
±1/2LSB MAXIMUM NONLINEARITY OVER
TEMPERATURE
GUARANTEED SPECIFICATIONS AT ±12V
AND ±15V SUPPLIES
TTL/5V CMOS-COMPATIBLE LOGIC
INPUTS
SBAS144
®
DAC811
2
DAC811AH, JP, JU DAC811BH, KP, KU
PARAMETER MIN TYP MAX MIN TYP MAX UNITS
DIGITAL INPUT
Resolution 12 Bits
Codes
(1)
USB, BOB
Digital Inputs Over Temperature Range
(2)
V
IH
+2 +15 ✻✻VDC
V
IL
0 +0.8 ✻✻VDC
I
IH
, V
I
= +2.7V +10 µA
I
IL
, V
I
= +0.4V ±20 µA
Digital Interface Timing Over Temperature Range
t
WP
, WR Pulse Width 50 ns
t
AW
1, N
X
and LDAC Valid to End of WR 50 ns
t
DW
, Data Valid to End of WR 80 ns
t
DH
, Data Valid Hold Time 0 ns
ACCURACY
Linearity Error ±1/4 ±1/2 ±1/8 ±1/4 LSB
Differential Linearity Error ±1/2 ±3/4 ±1/4 ±1/2 LSB
Gain Error
(3)
±0.1 ±0.2 ✻✻ %
Offset Error
(3, 4)
±0.05 ±0.15 ✻✻% of FSR
(5)
Monotonicity Guaranteed
Power Supply Sensitivity: +V
CC
±0.001 ±0.003 ✻✻% of FSR/%V
CC
–V
CC
±0.002 ±0.006 ✻✻% of FSR/%V
CC
V
DD
±0.0005 ±0.0015 ✻✻% of FSR/%V
DD
DRIFT (Over Specification Temperature Range)
Gain ±10 ±30 ±10 ±20 ppm/°C
Unipolar Offset ±5 ±10 ±5 ±7 ppm of FSR/°C
Bipolar Zero ±5 ±10 ±5 ±7 ppm of FSR/°C
Linearity Error Over Temperature Range ±1/2 ±3/4 ±1/4 ±1/2 LSB
Monotonicity Over Temperature Range Guaranteed
SETTLING TIME
(6)
(to within ±0.01% of FSR of Final Value; 2k load)
For Full Scale Range Change, 20V Range 3 4 ✻✻ µs
10V Range 3 4 ✻✻ µs
For 1LSB Change at Major Carry
(7)
1 µs
Slew Rate
(6)
812 ✻✻ V/µs
ANALOG OUTPUT
Voltage Range (±V
CC
= 15V)
(8)
: Unipolar 0 to +10 V
Bipolar ±5, ±10 V
Output Current ±5 mA
Output Impedance (at DC) 0.2
Short Circuit to Common Duration Indefinite
REFERENCE VOLTAGE
Voltage +6.2 +6.3 +6.4 ✻✻ V
Source Current Available for External Loads +2 mA
Temperature Coefficient ±10 ±30 ±10 ±20 ppm/°C
Short Circuit to Common Duration Indefinite
POWER SUPPLY REQUIREMENTS
Voltage: +V
CC
+11.4 +15 +16.5 ✻✻ VDC
–V
CC
–11.4 –15 –16.5 ✻✻ VDC
V
DD
+4.5 +5 +5.5 ✻✻ VDC
Current (no load): +V
CC
+16 +25 ✻✻ mA
–V
CC
–23 –35 ✻✻ mA
V
DD
+8 +15 ✻✻ mA
Potential at DCOM with Respect to ACOM
(9)
±0.5 V
Power Dissipation 625 800 ✻✻ mW
TEMPERATURE RANGE
Specification: J, K 0 +70 ✻✻°C
A, B –25 +85 ✻✻°C
R, S –65 +150 ✻✻°C
°C
Storage: J, K –60 +100 ✻✻°C
A, B, R, S –65 +150 ✻✻°C
Specification same as DAC811AH, JP, JU.
NOTES: (1) USB = unipolar straight binary; BOB = bipolar offset binary. (2) TTL, LSTTL and 54/74 HC compatible. (3) Adjustable to zero with external trim
potentiometer. (4) Error at input code 000
16
for both unipolar and bipolar ranges. (5) FSR means full scale range and is 20V for the ±10V range. (6) Maximum
represents the 3σ limit. Not 100% tested for this parameter. (7) At the major carry, 7FF
16
to 800
16
and 800
16
to 7FF
16
. (8) Minimum supply voltage required for ±10V
output swing is ±13.5V. Output swing for ±11.4V supplies is at least –8V to +8V. (9) The maximum voltage at which ACOM and DCOM may be separated without
affecting accuracy specifications.
SPECIFICATIONS
At T
A
= +25°C. ±V
CC
= 12V or 15V, unless otherwise noted.
3
®
DAC811
MINIMUM
RELATIVE DIFFERENTIAL PACKAGE SPECIFICATION
ACCURACY LINEARITY DRAWING TEMPERATURE ORDERING TRANSPORT
PRODUCT (LSB) (LSB) PACKAGE NUMBER RANGE NUMBER
(1)
MEDIA
DAC811AH ±1/2 LSB 3/4 CERDIP-28 149 –25°C to +85°C DAC811AH Rails
DAC811JP ±1/2 LSB 3/4 DIP-28 215 0°C to +70°C DAC811JP Rails
DAC811JU ±1/2 LSB 3/4 SO-28 217 0°C to +70°C DAC811JU Rails
"" """ "DAC811JU/1K Tape and Reel
DAC811KP ±1/4 LSB 1/2 DIP-28 215 0°C to +70°C DAC811KP Rails
DAC811KU ±1/4 LSB 1/2 SO-28 217 0°C to +70°C DAC811KU Rails
NOTE: (1) Models with a slash (/) are available only in Tape and Reel in the quantities indicated (e.g., /1K indicates 1000 devices per reel). Ordering 1000 pieces
of “DAC811JU/1K” will get a single 1000-piece Tape and Reel.
+V
CC
................................................................................................................................ 0 to +18V
–V
CC
to ACOM .......................................................................... 0 to –18V
V
DD
to DCOM .............................................................................. 0 to +7V
V
DD
to ACOM ...................................................................................... ±7V
ACOM to DCOM.................................................................................. ±7V
Digital Inputs (Pins 2–14, 16–19) to DCOM ...................... –0.4V to +18V
External Voltage Applied to 10V Range Resistor ............................ ±12V
Ref Out ............................................................. Indefinite Short to ACOM
External Voltage Applied to DAC Output................................ –5V to +5V
Power Dissipation ........................................................................ 1000mW
Lead Temperature (soldering, 10s)............................................... +300°C
Max Junction Temperature............................................................ +165°C
Thermal Resistance,
θ
J-A
: Plastic DIP and SOIC ....................... 100°C/W
Ceramic DIP .................................................................................. 65°C/W
NOTE: Stresses above those listed above may cause permanent damage to
the device. Exposure to absolute maximum conditions for extended periods
may affect device reliability.
PIN DESCRIPTIONS
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
ESD damage can range from subtle performance degradation
to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric
changes could cause the device not to meet its published
specifications.
PACKAGE/ORDERING INFORMATION
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
PIN
NAME FUNCTION
1+V
DD
Logic supply, +5V.
2 WR Write, command signal to load latches. Logic low
loads latches.
3 LDAC Load D/A converter, enables WR to load the D/A
latch. Logic low enables.
4N
A
Nibble A, enables WR to load input latch A (the
most significant nibble). Logic low enables.
5N
B
Nibble B, enables WR to load input latch B. Logic
low enables.
6N
C
Nibble C, enables WR to load input latch C (the
least significant nibble). Logic low enables.
7D
11
Data bit 12, MSB, positive true.
8D
10
Data bit 11.
9D
9
Data bit 10.
10 D
8
Data bit 9.
11 D
7
Data bit 8.
12 D
6
Data bit 7.
13 D
5
Data bit 6.
14 D
4
Data bit 5.
15 DCOM Digital common, V
DD
supply return.
16 D
0
Data bit 1, LSB.
17 D
1
Data bit 2.
18 D
2
Data bit 3.
19 D
3
Data bit 4.
20 +V
CC
Analog supply input, +15V or +12V.
21 –V
CC
Analog supply input, –15V or –12V.
22 Gain Adj To externally adjust gain.
23 ACOM Analog common, ±V
CC
supply return.
24 V
OUT
D/A converter voltage output.
25 10V Range Connect to pin 24 for 10V range.
26 SJ Summing junction of output amplifier.
27 BPO Bipolar offset. Connect to pin 26 for bipolar
operation.
28 Ref Out 6.3V reference output.
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