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142-0701-201

Part # 142-0701-201
Description SMA COAXIAL CONNECTOR
Category CONNECTOR
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

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Test Options on the EVM
8 Test Options on the EVM
8.1 On Chip (ADS1299) Input Short
The channel input can be shorted internally by setting the input multiplexer of the individual channel to
001. The global registers must be set as shown in Figure 51. The channel control registers must be set as
shown in Figure 50. This test gives the noise in the channel. It also gives the offset in the channel. The
result can be seen in the analysis tab. Figure 52 shows a snapshot of the scope for internal input short
with gain setting of 24. The channel offset in this example is 23uV and noise is less than 1µVpp. 5000pts
at 500sps is taken there by giving data for 10 seconds.
Figure 50. Channel Setting for Input Short Test
Figure 51. Global Register Settings for Input Short Test
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Test Options on the EVM
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Figure 52. Scope Tab for Input Short Test
8.2 External Input Short with 5K Resistor
There is an option on board to tie the positive and negative input of the channel to a common voltage
(VCM) on BIAS_ELEC through 5K resistors. The following jumper settings are needed for this test. On
JP6 short pin 1 and pin 2. On JP25 short (1-2) and (2-3). The connecter J6 must have jumpers across
from left to right to connect the inputs to the ADS1299 channels. The noise from U11 which is used to
generate the BIAS_ELEC appears as common mode noise for this test and is rejected. Same is true for
noise from resistor R10 in BIAS_ELEC path. The only noise source present are two 5K resistors in the
input path and the channel noise. This test is useful to measure the effect of input bias current on noise.
The PGA in ADS1299 has CMOS input and thus has negligible current noise. The input bias current is as
a result of chopping the PGA to remove flicker noise. This bias current doesn’t manifest itself as noise and
appears like a DC offset in presence of 5K input impedance. The Channel control registers must be
programmed as shown in Figure 53. The results in the analysis tab are shown in Figure 54. The average
peak-to-peak noise for this test is 1.27µV. The increase in noise is due to the noise from 5K resistors. The
two 5K resistors contribute about 0.67µVpp in 65Hz bandwidth.
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Test Options on the EVM
Figure 53. Global Register Settings for External Input Short Test
Figure 54. Scope Showing Noise for Input Short with 5k Resistors
45
SLAU443May 2012 EEG Front-End Performance Demonstration Kit
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Copyright © 2012, Texas Instruments Incorporated
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