AMP A8300A

Cross Number: 6W813

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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

TPS7A83A
GND
50 mV
100 mV
200 mV
400 mV
800 mV
1.6 V
BIAS
IN
EN
NR/SS
OUT
PG
SNS
FB
C
FF
R
PG
C
OUT
3.3 V
OUT
To Load
C
IN
V
IN
C
NR/SS
C
BIAS
Bias
Supply
Copyright © 2017, Texas Instruments Incorporated
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PG
OUT
IN
EN
Input Supply
TRF372017
TRF3722
TRF371125
TRF371135
VCC VCC
TPS7A83A
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An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TPS7A83A
SBVS304 JUNE 2017
TPS7A83A 2-A, High-Accuracy (0.75%), Low-Noise (4.4 µV
RMS
) LDO Regulator
1
1 Features
1
Low Dropout: 200 mV (max) at 2 A
0.75% (max) Accuracy Over Line, Load, and
Temperature With BIAS
Output Voltage Noise:
4.4 µ V
RMS
at 0.8-V Output
7.7 µ V
RMS
at 5.2-V Output
Input Voltage Range:
Without BIAS: 1.4 V to 6.5 V
With BIAS: 1.1 V to 6.5 V
ANY-OUT™ Operation:
Output Voltage Range: 0.8 V to 3.95 V
Adjustable Operation:
Output Voltage Range: 0.8 V to 5.2 V
Power-Supply Ripple Rejection:
40 dB at 500 kHz
Excellent Load Transient Response
Adjustable Soft-Start In-Rush Control
Open-Drain Power-Good (PG) Output
Stable with a 22-µF or Larger Ceramic Output
Capacitor
θ
JC
= 3.4°C/W
3.5-mm × 3.5-mm, 20-Pin VQFN
2 Applications
Digital Loads: SerDes, FPGAs, and DSPs
Instrumentation, Medical, and Audio
High-Speed Analog Circuits:
VCO, ADC, DAC, and LVDS
Imaging: CMOS Sensors and Video ASICs
Test and Measurement
3 Description
The TPS7A83A device is a low-noise (4.4 µV
RMS
),
low-dropout, linear regulator (LDO) capable of
sourcing 2 A with only 200 mV of maximum dropout.
The device output voltage is pin-programmable from
0.8 V to 3.95 V and adjustable from 0.8 V to 5.2 V
using an external resistor divider.
The combination of low noise (4.4 µV
RMS
), high
PSRR, and high output current capability makes the
TPS7A83A ideal to power noise-sensitive
components such as those found in high-speed
communications, video, medical, or test and
measurement applications. The high performance of
the TPS7A83A limits power-supply-generated phase
noise and clock jitter, making this device ideal for
powering high-performance serializer and deserializer
(SerDes), analog-to-digital converters (ADCs), digital-
to-analog converters (DACs), and RF components.
Specifically, RF amplifiers benefit from the high-
performance and 5.2-V output capability of the
device.
For digital loads [such as application-specific
integrated circuits (ASICs), field-programmable gate
arrays (FPGAs), and digital signal processors
(DSPs)] requiring low-input voltage, low-output (LILO)
voltage operation, the exceptional accuracy (0.75%
over load and temperature), remote sensing,
excellent transient performance, and soft-start
capabilities of the TPS7A83A ensure optimal system
performance.
The versatility of the TPS7A83A makes the device a
component of choice for many demanding
applications.
Device Information
(1)
PART NUMBER PACKAGE BODY SIZE (nom)
TPS7A83A VQFN (20) 3.50 mm × 3.50 mm
(1) For all available packages, see the orderable addendum at
the end of the datasheet.
Powering RF Components Typical Application Circuit
2
TPS7A83A
SBVS304 JUNE 2017
www.ti.com
Product Folder Links: TPS7A83A
Submit Documentation Feedback Copyright © 2017, Texas Instruments Incorporated
Table of Contents
1 Features.................................................................. 1
2 Applications ........................................................... 1
3 Description ............................................................. 1
4 Revision History..................................................... 2
5 Pin Configurations and Functions....................... 3
6 Specifications......................................................... 4
6.1 Absolute Maximum Ratings ...................................... 4
6.2 ESD Ratings.............................................................. 4
6.3 Recommended Operating Conditions....................... 4
6.4 Thermal Information.................................................. 5
6.5 Electrical Characteristics........................................... 5
6.6 Typical Characteristics.............................................. 7
7 Detailed Description............................................ 14
7.1 Overview ................................................................. 14
7.2 Functional Block Diagram....................................... 14
7.3 Feature Description................................................. 15
7.4 Device Functional Modes........................................ 18
8 Application and Implementation ........................ 19
8.1 Application Information............................................ 19
8.2 Typical Application .................................................. 36
9 Power Supply Recommendations...................... 37
10 Layout................................................................... 37
10.1 Layout Guidelines ................................................. 37
10.2 Layout Example .................................................... 38
11 Device and Documentation Support ................. 39
11.1 Device Support...................................................... 39
11.2 Documentation Support ........................................ 39
11.3 Receiving Notification of Documentation Updates 39
11.4 Community Resources.......................................... 39
11.5 Trademarks........................................................... 40
11.6 Electrostatic Discharge Caution............................ 40
11.7 Glossary................................................................ 40
12 Mechanical, Packaging, and Orderable
Information ........................................................... 40
4 Revision History
DATE REVISION NOTES
June 2017 * Initial release.
20 OUT6100mV
1OUT 15 IN
19 OUT7200mV
2SNS 14 EN
18 GND8GND
3FB 13 NR/SS
17 IN9400mV
4PG 12 BIAS
16 IN10800mV
550mV 11 1.6V
Not to scale
Thermal pad
3
TPS7A83A
www.ti.com
SBVS304 JUNE 2017
Product Folder Links: TPS7A83A
Submit Documentation FeedbackCopyright © 2017, Texas Instruments Incorporated
5 Pin Configurations and Functions
RGR Package
3.5-mm × 3.5-mm, 20-Pin VQFN
Top View
Pin Functions
PIN
DESCRIPTIONNAME NO. I/O
50mV 5
I
ANY-OUT voltage setting pins. These pins connect to an internal feedback network. Connect these pins to ground, SNS,
or leave floating. Connecting these pins to ground increases the output voltage, whereas connecting these pins to SNS
increases the resolution of the ANY-OUT network but decreases the range of the network; multiple pins can be
simultaneously connected to GND or SNS to select the desired output voltage. Leave these pins floating (open) when
not in use; see the ANY-OUT Operation section for additional details.
100mV 6
200mV 7
400mV 9
800mV 10
1.6V 11
BIAS 12 I
BIAS supply voltage. This pin enables the use of low-input voltage, low-output (LILO) voltage conditions (that is, V
IN
=
1.2 V, V
OUT
= 1 V) to reduce power dissipation across the die. The use of a BIAS voltage improves dc and ac
performance for V
IN
2.2 V. A 10-µF capacitor or larger must be connected between this pin and ground if the BIAS pin
is used. If not used, this pin must be left floating or tied to ground and a capacitor is not needed.
EN 14 I
Enable pin. Driving this pin to logic high enables the device; driving this pin to logic low disables the device. If enable
functionality is not required, this pin must be connected to IN or BIAS.
FB 3 I
Feedback pin connected to the error amplifier. Although not required, TI recommends a 10-nF feed-forward capacitor
from FB to OUT (as close to the device as possible) to maximize ac performance. The use of a feed-forward capacitor
may disrupt PG (power good) functionality; see the ANY-OUT Operation and Adjustable Operation sections for more
details.
GND 8, 18
Ground pin. These pins must be connected to ground, the thermal pad, and each other with a low-impedance
connection.
IN 15-17 I
Input supply voltage pin. A 10-µF or larger ceramic capacitor (5 µF or greater of capacitance) from IN to ground is
recommended to reduce the impedance of the input supply. Place the input capacitor as close as possible to the input;
see the Input and Output Capacitor Requirements section for more details.
NR/SS 13
Noise-reduction and soft-start pin. Connecting an external capacitor between this pin and ground reduces reference
voltage noise and also enables the soft-start function. Although not required, TI recommends a 10-nF or larger capacitor
to be connected from NR/SS to GND (as close to the pin as possible) to maximize ac performance; see the Noise-
Reduction and Soft-Start Capacitor section for more details.
OUT 1, 19, 20 O
Regulated output pin. A 22-μF or larger ceramic capacitor (10 μF or greater of capacitance) from OUT to ground is
required for stability and must be placed as close to the output as possible. Minimize the impedance from the OUT pin to
the load; see the Input and Output Capacitor Requirements section for more details.
PG 4 O
Active-high, power-good pin. An open-drain output indicates when the output voltage reaches V
IT(PG)
of the target. The
use of a feed-forward capacitor can disrupt PG (power-good) functionality; see the Power-Good (PG) Function section
for more details.
SNS 2 I
Output voltage sense input pin. This pin connects the internal R
1
resistor to the output. Connect this pin to the load side
of the output trace only if the ANY-OUT feature is used. If the ANY-OUT feature is not used, leave this pin floating; see
the ANY-OUT Programmable Output Voltage and Adjustable Operation sections for more details.
Thermal pad Pad Connect the thermal pad to a large-area ground plane. The thermal pad is internally connected to GND.
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