- 19 -`

AUGUST08,2012|DATASHEET| Rev3.1

IR3894

12AHighlyIntegratedSupIRBuck

Single‐InputVoltage,SynchronousBuckRegulator

PD‐97745

SOFT‐START

IR3894hasaninternaldigitalsoft‐starttocontrolthe

outputvoltageriseandtolimitthecurrentsurgeatthe

start‐up.Toensurecorrectstart‐up,thesoft‐start

sequenceinitiateswhentheEnableandVccriseabove

theirUVLOthresholdsandgeneratethePowerOnReady

(POR)signal.

Theinternalsoft‐start(Intl_SS)signallinearly

riseswiththerateof0.2mV/µsfrom0Vto1.5V.Figure7

showsthewaveformsduringsoftstart(alsorefertoFig.

20).ThenormalVoutstartuptimeisfixed,andisequalto:



0.65V-0.15V

2.5ms (1)

0.2mV/ s

start



  

Duringthesoftstarttheover‐currentprotection(OCP)and

over‐voltageprotection(OVP)isenabledtoprotectthe

deviceforanyshortcircuitorovervoltagecondition.

POR

Intl_SS

Vout

0.15V

0.65V

1.5V

3.0V



Figure7:Theoreticaloperationwaveformsduring

soft‐start(nontracking/nonsequencing)

OPERATINGFREQUENCY

Theswitchingfrequencycanbeprogrammedbetween300

kHz–1500kHzbyconnectinganexternalresistorfromR



pintoGnd.Table1tabulatestheoscillatorfrequency

versusR

.

SHUTDOWN

IR3894canbeshutdownbypullingtheEnablepinbelow

its1.0Vthreshold.Thiswilltri‐stateboththehighsideand

thelowsidedriver.



ABLE1:SWITCHINGFREQUENCY(FS)VS.EXTERNALRESISTOR(R

)

Rt(KΩ) Freq(kHz)

80.6 300

60.4 400

48.7 500

39.2 600

34 700

29.4 800

26.1 900

23.2 1000

21 1100

19.1 1200

17.6 1300

16.2 1400

15 1500

OVERCURRENTPROTECTION

Theovercurrent(OC)protectionisperformedbysensing

currentthroughtheR

DS(on)

oftheSynchronousMosfet.This

methodenhancestheconverter’sefficiency,reducescost

byeliminatingacurrentsenseresistorandanylayout

relatednoiseissues.Thecurrentlimitispre‐setinternally

andiscompensatedaccordingtotheICtemperature.Soat

differentambienttemperature,theover‐currenttrip

thresholdremains

almostconstant.

OverCurrentProtectioncircuitsensestheinductorcurrent

flowingthroughtheSynchronousMosfetclosertothe

valleypoint.OCPcircuitsamplesthiscurrentfor40nsec

typicallyaftertherisingedgeofthePWMsetpulsewhich

hasawidthof12.5%oftheswitchingperiod.ThePWM

pulsestarts

atthefallingedgeofthePWMsetpulse.This

makesvalleycurrentsensemorerobustascurrentis

sensedclosetothebottomoftheinductordownward

slopewheretransientandswitchingnoisearelowerand

helpstopreventfalsetrippingduetonoiseandtransient.

AnOCcondition

isdetectediftheloadcurrentexceedsthe

threshold,theconverterentersintohiccupmode.PGood

willgolowandtheinternalsoftstartsignalwillbepulled

low.Theconvertergoesintohiccupmodewitha20.48ms

(typ.)delayasshowninFigure8.Theconvertorstaysin

thismode

untiltheoverloadorshortcircuitisremoved.

TheactualDCoutputcurrentlimitpointwillbegreater

thanthevalleypointbyanamountequaltoapproximatey

halfofpeaktopeakinductorripplecurrent.Thecurrent

limitpointwillbeafunctionoftheinductorvalue,

input

,outputvoltageandthefrequencyofoperation.



- 20 -`

AUGUST08,2012|DATASHEET| Rev3.1

IR3894

12AHighlyIntegratedSupIRBuck

Single‐InputVoltage,SynchronousBuckRegulator

PD‐97745

(2)

OCP LIMIT







OCP

=DCcurrentlimithiccuppoint

LIMIT

=CurrentlimitValleyPoint

ΔI=Inductorripplecurrent



Figure8:TimingDiagramfor

CurrentLimitHiccup

THERMALSHUTDOWN

TemperaturesensingisprovidedinsideIR3894.Thetrip

thresholdistypicallysetto145

C.Whentripthresholdis

exceeded,thermalshutdownturnsoffbothMOSFETsand

resetstheinternalsoftstart.

Automaticrestartisinitiatedwhenthesensed

temperaturedropswithintheoperatingrange.Thereis

a20

Chysteresisinthethermalshutdownthreshold.

EXTERNALSYNCHRONIZATION

IR3894incorporatesaninternalphaselockloop(PLL)

circuitwhichenablessynchronizationoftheinternal

oscillatortoanexternalclock.Thisfunctionisimportantto

avoidsub‐harmonicoscillationsduetobeatfrequencyfor

embeddedsystemswhenmultiplepoint‐of‐load(POL)

regulatorsareused.Amulti‐functionpin,Rt/Sync,is

used

toconnecttheexternalclock.Iftheexternalclockis

presentbeforetheconverterturnson,Rt/Syncpincanbe

connectedtotheexternalclocksignalsolelyandnoother

resistorisneeded.Iftheexternalclockisappliedafterthe

converterturnson,ortheconverterswitchingfrequency

needstotogglebetweentheexternalclockfrequencyand

theinternalfree‐runningfrequency,anexternalresistor

fromRt/SyncpintoGndisrequiredtosetthefree‐running

frequency.

WhenanexternalclockisappliedtoRt/Syncpinafterthe

converterrunsinsteadystatewithitsfree‐running

frequency,

atransitionfromthefree‐runningfrequencyto

theexternalclockfrequencywillhappen.Thistransitionis

tograduallymaketheactualswitchingfrequencyequalto

theexternalclockfrequency,nomatterwhichoneis

higher.Onthecontrary,whentheexternalclocksignalis

removedfromRt/Syncpin,the

switchingfrequencyisalso

changedtofree‐runninggradually.Inordertominimize

theimpactfromthesetransitionstooutputvoltage,a

diodeisrecommendedtoaddbetweentheexternalclock

andRt/Syncpin,asshowninFigure9a.Figure9bshows

thetimingdiagramofthesetransitions.



IR3894

Rt/Sync

Gnd



Figure9a:ConfigurationofExternalSynchronization

Figure9b:TimingDiagramforSynchronization

totheexternalclock(Fs1>Fs2orFs1<Fs2)



AninternalcircuitisusedtochangethePWMrampslope

accordingtotheclockfrequencyappliedonRt/Syncpin.

Eventhoughthefrequencyoftheexternalsynchronization

clockcanvaryinawiderange,thePLLcircuitwillmake

surethattherampamplitudeiskeptconstant,requiringno

adjustmentoftheloopcompensation.Vinvariationalso

affectstherampamplitude,whichwillbediscussed

separatelyinFeed‐Forwardsection.

- 21 -`

AUGUST08,2012|DATASHEET| Rev3.1

IR3894

12AHighlyIntegratedSupIRBuck

Single‐InputVoltage,SynchronousBuckRegulator

PD‐97745

Feed‐Forward

Feed‐Forward(F.F.)isanimportantfeature,becauseitcan

keeptheconverterstableandpreserveitsloadtransient

performancewhenVinvariesinalargerange.InIR3894,

F.F.functionisenabledwhenVinpinisconnectedtoPVin

pin.Inthiscase,theinternallowdropout(LDO)regulatoris



used.ThePWMrampamplitude(Vramp)isproportionally

changedwithVintomaintainVin/Vrampalmostconstant

throughoutVinvariationrange(asshowninFig.10).Thus,

thecontrolloopbandwidthandphasemargincanbe

maintainedconstant.Feed‐forwardfunctioncanalso

minimizeimpactonoutputvoltagefromfastVin

change.

ThemaximumVinslewrateiswithin1V/µs.

IfanexternalbiasvoltageisusedasVcc,Vinpinshouldbe

connectedtoVcc/LDO_outpininsteadofPVinpin.Then

theF.F.functionisdisabled.Are‐calculationofcontrol

loopparametersisneededforre‐compensation.



Figure10:TimingDiagramforFeed‐Forward(F.F.)Function

SMARTLOWDROPOUTREGULATOR(LDO)

IR3894hasanintegratedlowdropout(LDO)regulator

whichcanprovidegatedrivevoltageforbothdrivers.

Inordertoimproveoverallefficiencyoverthewholeload

range,LDOvoltageissetto6.4V(typical.)atmid‐orheavy

loadconditiontoreduceRds(on)andthusMOSFET

conductionloss;andit

isreducedto4.4(typical.)atlight

loadconditiontoreducegatedriveloss.

ThesmartLDOcanselectitsoutputvoltageaccordingto

theloadconditionbysensingswitchnode(SW)voltage.At

lightloadconditionwhenpartoftheinductorcurrent

flowsinthereversedirection(DCM=1),V

SW

>0onLDrv

fallingedgeinaswitchingcycle.Ifthiscasehappensfor

consecutive256switchingcycles,thesmartLDOreduces

itsoutputto4.4V.Ifinanyoneofthe256cycles,Vsw<0

onLDrvfallingedge,thecounterisresetandLDOvoltage

doesn’tchange.

Ontheotherhand,ifVsw<0onLDrv

fallingedge(DCM=0),LDOoutputisincreasedto6.4V.A

hysteresisbandisaddedtoVswcomparisontoavoid

chattering.Figure11showsthetimingdiagram.Whenever

deviceturnson,LDOalwaysstartswith6.4V,andthen

goesto4.4V/6.4V

dependingupontheloadcondition.For

internallybiasedsinglerailoperation,Vinpinshouldbe

connectedtoPVinpin,asshowninFigure11b.Ifexternal

biasvoltageisused,Vinpinshouldbeconnectedto

Vcc/LDO_Outpin,asshowninFigure11c.

Vcc/

LDO

256/Fs

...

6.4V

4.4V

...



Figure11a:TimeDiagramforSmartLDO

Figure11b:InternallyBiasedSingleRailOperation

Ext

VCC

Vin

IR3894

VCC/

LDO_OUT

PGnd

Vin PVin

Figure11c:UseExternalBiasVoltage

OUTPUTVOLTAGETRACKINGANDSEQUENCING

IR3894canaccommodateuserprogrammabletracking

and/orsequencingoptionsusingVp,Vref,Enable,and

PowerGoodpins.Intheblockdiagrampresentedonpage

3,theerror‐amplifier(E/A)hasbeendepictedwiththree

positiveinputs.Ideally,theinputwiththelowestvoltage

Part #	ERJ-3EKF1000V
Description	RES THKFLM 0603 100 OHM 1% 1/10W 100PPM/ C SMD - Cut TR (S
Category	CHIP RESISTOR
Availability	Out of Stock
Qty	0

ERJ-3EKF1000V

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