Freelance Electronics Components Distributor
Closed Dec 25th-26th
800-300-1968
We Stock Hard to Find Parts

C3225X5R0J107M

Part # C3225X5R0J107M
Description Cap Ceramic 100uF 6.3V X5R 20% SMD 1210 85C Plastic T/R
Additional Information:


Category CAPACITOR
Availability Out of Stock
Qty 0
Qty Price
1 + $1.82178



Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

6.5 V, 4 A, High Efficiency,
Step-Down DC-to-DC Regulator
Data Sheet
ADP2164
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2011 Analog Devices, Inc. All rights reserved.
FEATURES
4 A continuous output current
43 mΩ and 29 mΩ integrated FET
±1.5% output accuracy
Input voltage range: 2.7 V to 6.5 V
Output voltage: 0.6 V to V
IN
Switching frequency
Fixed frequency: 600 kHz or 1.2 MHz
Adjustable frequency: 500 kHz to 1.4 MHz
Synchronizable from 500 kHz to 1.4 MHz
Selectable synchronize phase shift: 0° or 180°
Current mode architecture
Precision enable input
Power-good output
Voltage tracking input
Integrated soft start
Internal compensation
Starts up into a precharged output
UVLO, OVP, OCP, and thermal shutdown
Available in 16-lead, 4 mm × 4 mm LFCSP package
APPLICATIONS
Point-of-load conversion
Communications and networking equipment
Industrial and instrumentation
Consumer electronics
TYPICAL APPLICATIONS CIRCUIT
09944-001
ADP2164
PGOOD
EN
C
OUT
C1
R2
R
T
C
IN
V
OUT
V
IN
SYNC
TRK
RT
SW
FB
PGND
GND
VIN
L
R1
PVIN
Figure 1.
100
95
90
85
80
75
70
65
60
55
50
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
OUTPUT CURRENT (A)
EFFICIENCY (%)
09944-002
V
IN
= 5V
f
S
= 600kHz
V
OUT
= 1.2V
V
OUT
= 3.3V
Figure 2. Efficiency vs. Output Current
GENERAL DESCRIPTION
The ADP2164 is a 4 A, synchronous, step-down dc-to-dc regulator
in a compact 4 mm × 4 mm LFCSP package. The regulator uses a
current mode, constant frequency pulse-width modulation (PWM)
control scheme for excellent stability and transient response.
The input voltage range of the ADP2164 is 2.7 V to 6.5 V. The
output voltage of the ADP2164 is adjustable from 0.6 V to the
input voltage (V
IN
). The ADP2164 is also available in six preset
output voltage options: 3.3 V, 2.5 V, 1.8 V, 1.5 V, 1.2 V, and 1.0 V.
The ADP2164 integrates a pair of low on-resistance P-channel
and N-channel internal MOSFETs to maximize efficiency and
minimize external component count. The 100% duty cycle
operation allows low dropout voltage at 4 A output current.
The high, 1.2 MHz PWM switching frequency allows the use of
small external components, and the SYNC input enables multiple
ICs to synchronize out of phase to reduce ripple and eliminate
beat frequencies.
Other key features of the ADP2164 include undervoltage lockout
(UVLO), integrated soft start to limit inrush current at startup,
overvoltage protection (OVP), overcurrent protection (OCP),
and thermal shutdown.
ADP2164 Data Sheet
Rev. 0 | Page 2 of 20
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
Typical Applications Circuit ............................................................ 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Absolute Maximum Ratings ............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Functional Block Diagram ............................................................ 13
Theory of Operation ...................................................................... 14
Control Scheme .......................................................................... 14
Slope Compensation .................................................................. 14
Precision Enable/Shutdown ...................................................... 14
Integrated Soft Start ................................................................... 14
Oscillator and Synchronization ................................................ 14
Power Good ................................................................................ 15
Current Limit and Short-Circuit Protection ............................ 15
Overvoltage Protection (OVP) ................................................. 15
Undervoltage Lockout (UVLO) ............................................... 15
Thermal Shutdown .................................................................... 15
Applications Information .............................................................. 16
Output Voltage Selection ........................................................... 16
Inductor Selection ...................................................................... 16
Output Capacitor Selection ....................................................... 16
Input Capacitor Selection .......................................................... 17
Voltage Tracking ......................................................................... 17
Applications Circuits ...................................................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide .......................................................................... 19
REVISION HISTORY
12/11—Revision 0: Initial Version
Data Sheet ADP2164
Rev. 0 | Page 3 of 20
SPECIFICATIONS
VIN = PVIN = 3.3 V, EN high, SYNC high, T
J
= −40°C to +125°C, unless otherwise noted. Typical values are at T
J
= 25°C.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
VIN AND PVIN PINS
VIN Voltage Range VIN 2.7 6.5 V
PVIN Voltage Range PVIN 2.7 6.5 V
Quiescent Current I
VIN
No switching 895 1100 μA
Shutdown Current I
SHDN
VIN = PVIN = 6.5 V, EN = GND 9 12 μA
VIN Undervoltage Lockout Threshold UVLO VIN rising 2.6 2.7 V
VIN falling 2.4 2.5 V
OUTPUT CHARACTERISTICS Specified by the circuit in Figure 42
Load Regulation I
O
= 0 A to 4 A 0.05 %/A
Line Regulation I
O
= 2 A 0.05 %/V
FB PIN
FB Regulation Voltage V
FB
T
J
= −40°C to +125°C 0.591 0.6 0.609 V
FB Bias Current I
FB
0.01 0.1 μA
SW PIN
High-Side On Resistance
1
VIN = PVIN = 3.3 V, I
SW
= 500 mA 35 52 70
VIN = PVIN = 5 V, I
SW
= 500 mA 30 43 55
Low-Side On Resistance
1
VIN = PVIN = 3.3 V, I
SW
= 500 mA 24 32 40
VIN = PVIN = 5 V, I
SW
= 500 mA 20 29 35
SW Peak Current Limit High-side switch, PVIN = 3.3 V 5 6.2 7.4 A
SW Maximum Duty Cycle Full frequency 100 %
SW Minimum On Time
2
Full frequency 100 ns
TRK PIN
TRK Input Voltage Range 0 600 mV
TRK to FB Offset Voltage TRK = 0 mV to 500 mV −15 +15 mV
TRK Input Bias Current 100 nA
FREQUENCY
Switching Frequency f
S
RT = VIN 1.08 1.2 1.32 MHz
RT = GND 540 600 660 kHz
RT = 91 kΩ 480 600 720 kHz
Switching Frequency Range 500 1400 kHz
RT Pin Input High Voltage 1.2 V
RT Pin Input Low Voltage 0.45 V
SYNC PIN
Synchronization Range 0.5 1.4 MHz
Minimum Pulse Width 100 ns
Minimum Off Time 100 ns
Input High Voltage 1.2 V
Input Low Voltage 0.4 V
PGOOD PIN
Power-Good Range FB rising threshold 105 110 115 %
FB rising hysteresis 2.5 %
FB falling threshold 85 90 95 %
FB falling hysteresis 2.5 %
Power-Good Deglitch Time From FB to PGOOD 16
Clock
cycles
Power-Good Leakage Current V
PGOOD
= 5 V 0.1 1 μA
Power-Good Output Low Voltage I
PGOOD
= 1 mA 170 220 mV
1234567NEXT