Application Report
SLVA340A–June 2009–Revised May 2010
High-Integration, High-Efficiency Power Solution Using
DC/DC Converters With DVFS
Ambreesh Tripathi .......................................................................... PMP - DC/DC Low-Power Converters
ABSTRACT
This reference design helps those desiring to design-in the TMS320C6742, TMS320C6746,
TMS320C6748 and OMAP-L138. This design, employing sequenced power supplies, describes a system
with an input voltage of 5V, and uses a high-efficiency DC/DC Converter with integrated FETs and DVFS
for a small, simple system.
Sequenced power supply architectures are becoming commonplace in high-performance microprocessor
and digital signal processor (DSP) systems. To save power and increase processing speeds, processor
cores have small-geometry cells that require lower supply voltages than the system-bus voltages. Power
management in these systems requires special attention. This application note addresses these topics
and suggests solutions for output-voltage sequencing.
Contents
1 Introduction .................................................................................................................. 1
2 Power Requirements ....................................................................................................... 2
3 Features ...................................................................................................................... 3
4 List of Material ............................................................................................................... 5
List of Figures
1 PMP4977 Reference Design Schematic................................................................................. 4
2 Optional circuit for DVDD_A, DVDD_B and DVDD_C ................................................................. 5
3 Shows Sequencing in Start-Up Waveform .............................................................................. 7
4 DCDC1: Efficiency vs Output Current.................................................................................... 7
5 DCDC2: Efficiency vs Output Current.................................................................................... 7
6 DCDC3: Efficiency vs Output Current.................................................................................... 7
List of Tables
1 PMP4977 List of Material .................................................................................................. 5
1 Introduction
In dual-voltage architectures, coordinated management of power supplies is necessary to avoid potential
problems and ensure reliable performance. Power supply designers must consider the timing and voltage
differences between core and I/O voltage supplies during power-up and power-down operations.
Sequencing refers to the order, timing and differential in which the two voltage rails are powered up and
down. A system designed without proper sequencing may be at risk for two types of failures. The first of
these represents a threat to the long term reliability of the dual-voltage device, while the second is more
immediate, with the possibility of damaging interface circuits in the processor or system devices such as
memory, logic or data-converter ICs.
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C is a trademark of Philips Electronics N.V. Corporation.
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SLVA340A–June 2009–Revised May 2010 High-Integration, High-Efficiency Power Solution Using DC/DC Converters With
DVFS
Copyright © 2009–2010, Texas Instruments Incorporated
