National Semiconductor Corp 100398QC

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Technical Document


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100398
Industrial Version (Continued)
ECL-to-TTL DC Electrical Characteristics (Note 12)
V
EE
= 4.2V to 5.7V, GND = 0V, T
C
= 40°C to +85°C, C
L
= 50 pF, V
TTL
= +4.5V to +5.5V
Note 12: The specified limits represent the worst case value for the parameter. Since these values normally occur at the temperature extremes, additional
noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are cho-
sen to guarantee operation under worst case conditions.
PCC TTL-to-ECL AC Electrical Characteristics
V
EE
= 4.2V to 5.7V, V
TTL
= +4.5V to +5.5V
Symbol Parameter Min Typ Max Units Conditions
V
OH
Output HIGH Voltage 2.7 3.1 V I
OH
= 3 mA, V
TTL
= 4.75V
2.4 2.9 V I
OH
= 3 mA, V
TTL
= 4.50V
V
OL
Output LOW Voltage 0.3 0.5 V I
OL
= 24 mA, V
TTL
= 4.50V
V
IH
Input HIGH Voltage 1170 870 mV Guaranteed HIGH Signal for All Inputs
V
IL
Input LOW Voltage 1830 1480 mV Guaranteed LOW Signal for All Inputs
V
DIFF
Input Voltage Differential 150 mV Required for Full Output Swing
V
CM
Common Mode Voltage GNDECL 2.0 GNDECL 0.5 V
I
IH
Input HIGH Current 35 µAV
IN
= V
IH(Max)
I
IL
Input LOW Current 0.50 µAV
IN
= V
IH(Min)
I
OZHT
3-STATE Current Output High 70 µAV
OUT
= +2.7V
I
OZLT
3-STATE Current Output Low 650 µAV
OUT
= +0.5V
I
OS
Output Short-Circuit Current 100 225 mA V
OUT
= 0.0V, V
TTL
= +5.5V
I
CEX
Output HIGH Leakage Current 50 µAV
OUT
= 5.5V
I
ZZ
Bus Drainage Test 500 µAV
OUT
= 5.25V
I
TTL
V
TTL
Supply Current 39 mA TTL Outputs LOW
27 mA TTL Outputs HIGH
39 mA TTL Outputs in 3-STATE
Symbol Parameter
T
C
= 40°CT
C
= +25°CT
C
= +85°C
Units Conditions
Min Max Min Max Min Max
f
MAX
Toggle Frequency 180 180 180 MHz
t
PLH
T
n
to E
n
, E
n
0.90 2.40 0.80 2.20 0.70 2.50 ns Figures 1, 3
t
PHL
(Transparent)
t
PLH
LE to E
n
, E
n
1.30 2.70 1.50 2.70 1.80 3.10 ns Figures 1, 3
t
PHL
t
PZH
OE to E
n
, E
n
2.90 9.00 2.80 6.90 2.80 5.80 ns Figures 1, 3
(Cutoff to HIGH)
t
PHZ
OE to E
n
, E
n
1.10 2.70 1.40 2.90 1.70 3.40 ns Figures 1, 3
(HIGH to Cutoff)
t
PHZ
DIR to E
n
, E
n
1.10 2.70 1.40 2.90 1.80 3.50 ns Figures 1, 3
(HIGH to Cutoff)
t
S
T
n
to LE 0.70 0.70 0.70 ns Figures 1, 3
t
H
T
n
to LE 0.90 0.90 0.90 ns Figures 1, 3
t
TLH
Transition Time
0.45 2.20 0.45 1.50 0.45 1.50 ns Figures 1, 3
t
THL
20% to 80%, 80% to 20%
www.fairchildsemi.com 8
100398
Industrial Version (Continued)
PCC ECL-to-TTL AC Electrical Characteristics
V
EE
= 4.2V to 5.7V, V
TTL
= +4.5V to +5.5V, C
L
= 50 pF
Symbol Parameter
T
C
= 40°CT
C
= +25°CT
C
= +85°C
Units Conditions
MinMaxMinMaxMinMax
f
MAX
Toggle Frequency 75 75 75 MHz
t
PLH
E
n
, E
n
to T
n
1.70 4.90 1.70 5.10 1.80 5.80 ns Figures 2, 4
t
PHL
(Transparent)
t
PLH
LE to T
n
2.30 4.80 2.40 4.70 2.60 4.90
ns Figures 2, 4
t
PHL
3.30 5.50 3.50 5.70 4.00 6.70
t
PZH
OE to T
n
2.30 5.50 2.10 4.70 2.00 4.30
ns Figures 2, 5
t
PZL
(Enable Time) 4.10 8.20 4.10 7.80 4.20 7.80
t
PHZ
OE to T
n
3.20 7.90 3.30 7.50 3.70 7.90
ns Figures 2, 5
t
PLZ
(Disable Time) 4.00 7.40 4.30 7.80 5.30 9.40
t
PHZ
DIR to T
n
2.00 6.60 1.90 5.70 1.70 5.20
ns Figures 2, 6
t
PLZ
(Disable Time) 2.10 4.70 2.00 3.70 1.90 3.70
t
S
E
n
, E
n
to LE 0.50 0.50 0.50 ns Figures 2, 4
t
H
E
n
, E
n
to LE 1.00 1.00 1.00 ns Figures 2, 4
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100398
Test Circuitry
FIGURE 1. TTL-to-ECL AC Test Circuit
C
L
= 50 pF including stray and jig capacitance.
Note: 50 to ground termination must be included on ECL I/O pins not monitored by a 50 scope to prevent oscillatory feedback.
FIGURE 2. ECL-to-TTL AC Test Circuit
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