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5962-8984501CA

Part # 5962-8984501CA
Description IC, QUAD POS-NANDGATE W/SCH - Rail/Tube
Category IC
Availability In Stock
Qty 5
Qty Price
1 - 1 $13.82206
2 - 2 $10.99482
3 - 3 $10.36655
4 + $9.63356
Manufacturer Available Qty
Harris Corporation
Date Code: 9422
  • Shipping Freelance Stock: 5
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

4
Input Leakage
Current
I
I
V
CC
or
GND
-6--±0.1 - ±1-±1 µA
Quiescent Device
Current
I
CC
V
CC
or
GND
0 6 - - 2 - 20 - 40 µA
HCT TYPES
Input Switch Points
(Note 2)
V
T
+ - - 4.5 1.2 - 1.9 1.2 1.9 1.2 1.9 V
5.5 1.4 - 2.1 1.4 2.1 1.4 2.1 V
V
T
- - - 4.5 0.5 - 1.2 0.5 1.2 0.5 1.2 V
5.5 0.6 - 1.4 0.6 1.4 0.6 1.4 V
V
H
- - 4.5 0.4 - 1.4 0.4 1.4 0.4 1.4 V
5.5 0.4 - 1.5 0.4 1.5 0.4 1.5 V
High Level Output
Voltage
CMOS Loads
-
V
T
+
or
V
T
-
-0.02 4.5 4.4 - - 4.4 - 4.4 - V
High Level Output
Voltage
TTL Loads
-4 4.5 3.98 - - 3.84 - 3.7 - V
Low Level Output
Voltage CMOS Loads
V
OL
V
T
+
or
V
T
-
0.02 4.5 - - 0.1 - 0.1 - 0.1 V
Low Level Output
Voltage
TTL Loads
4 4.5 - - 0.26 - 0.33 - 0.4 V
Input Leakage
Current
I
I
V
CC
and
GND
- 5.5 - - ±0.1 - ±1-±1 µA
Quiescent Device
Current
I
CC
V
CC
or
GND
0 5.5 - - 2 - 20 - 40 µA
Additional Quiescent
Device Current Per
Input Pin: 1 Unit Load
∆I
CC
(Note 3)
V
CC
- 2.1
- 4.5 to
5.5
- 100 360 - 450 - 490 µA
NOTES:
2. Hysteresis definition, characteristic and test setup see Test Circuits and Waveforms
3. For dual-supply systems theoretical worst case (V
I
= 2.4V, V
CC
= 5.5V) specification is 1.8mA.
DC Electrical Specifications (Continued)
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSV
I
(V) I
O
(mA) MIN TYP MAX MIN MAX MIN MAX
CD54HC132, CD74HC132, CD54HCT132, CD74HCT132
5
HCT Input Loading Table
INPUT UNIT LOADS
nA, nB 0.6
NOTE: Unit Load is ∆I
CC
limit specified in DC Electrical Specifica-
tions table, e.g. 360µA max at 25
o
C.
Switching Specifications Input t
r
, t
f
= 6ns
PARAMETER SYMBOL
TEST
CONDITIONS
V
CC
(V)
25
o
C -40
o
C TO 85
o
C -55
o
C TO 125
o
C
UNITSMIN TYP MAX MIN MAX MIN MAX
HC TYPES
Propagation Delay
A, B to Y (Figure 1)
t
PLH
, t
PHL
C
L
= 50pF 2 - - 125 - 156 - 188 ns
4.5 - - 25 - 31 - 38 ns
6 - - 21 - 27 - 32 ns
Propagation Delay
A, B to Y
t
TLH
, t
THL
C
L
= 15pF 5 - 10 - ----pF
Transition Times (Figure 1) t
TLH
, t
THL
C
L
= 50pF 2 - - 75 - 95 - 110 ns
4.5 - - 15 - 19 - 22 ns
6 - - 13 - 16 - 19 ns
Input Capacitance C
I
- - - - 10 - 10 - 10 pF
Power Dissipation Capacitance
(Notes 4, 5)
C
PD
- 5-30-----pF
HCT TYPES
Propagation Delay
A, B to Y
(Figure 2)
t
PHL
, t
PHL
C
L
= 50pF 4.5 - - 33 - 41 - 50 ns
Propagation Delay
A, B to Y
t
PLH
, t
PHL
C
L
= 15pF 5 - 13 - ----pF
Transition Times (Figure 2) t
TLH
, t
THL
C
L
= 50pF 4.5 - - 15 - 19 - 22 ns
Input Capacitance C
I
- - - - 10 - 10 - 10 pF
Power Dissipation Capacitance
(Notes 4, 5)
C
PD
- 5-30-----pF
NOTES:
4. C
PD
is used to determine the dynamic power consumption, per gate.
5. P
D
= V
CC
2
f
i
(C
PD
+ C
L
) where f
i
= input frequency, C
L
= output load capacitance, V
CC
= supply voltage.
CD54HC132, CD74HC132, CD54HCT132, CD74HCT132
6
Test Circuits and Waveforms
FIGURE 1. HC AND HCU TRANSITION TIMES AND PROPAGA-
TION DELAY TIMES, COMBINATION LOGIC
FIGURE 2. HCT TRANSITION TIMES AND PROPAGATION
DELAY TIMES, COMBINATION LOGIC
FIGURE 3. HYSTERESIS DEFINITION, CHARACTERISTIC, AND TEST SET-UP
t
PHL
t
PLH
t
THL
t
TLH
90%
50%
10%
50%
10%
INVERTING
OUTPUT
INPUT
GND
V
CC
t
r
= 6ns t
f
= 6ns
90%
t
PHL
t
PLH
t
THL
t
TLH
2.7V
1.3V
0.3V
1.3V
10%
INVERTING
OUTPUT
INPUT
GND
3V
t
r
= 6ns
t
f
= 6ns
90%
V
CC
V
l
GND
V
CC
V
O
GND
V
CC
V
l
V
O
V
O
V
H
V
H
= V
+
T
- V
-
T
-
T
V
+
T
V
V
H
V
l
-
T
V
+
T
V
CD54HC132, CD74HC132, CD54HCT132, CD74HCT132
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