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C8051F041-GQ

Part # C8051F041-GQ
Description MCU 8BIT CISC 64KB FLASH 3V 64TQFP - Trays
Category IC
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SILICON LABORATORIES
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Technical Document


DISCLAIMER: The information provided herein is solely for informational purposes. Customers must be aware of the suitability of this product for their application, and consider that variable factors such as Manufacturer, Product Category, Date Codes, Pictures and Descriptions may differ from available inventory.

C8051F040/1/2/3/4/5/6/7
Rev. 1.5 175
14.2. External Oscillator Drive Circuit
The external oscillator circuit may drive an external crystal, ceramic resonator, capacitor, or RC network. A
CMOS clock may also provide a clock input. For a crystal or ceramic resonator configuration, the crystal/
resonator must be wired across the XTAL1 and XTAL2 pins as shown in Option 1 of Figure 14.1. In RC,
capacitor, or CMOS clock configuration, the clock source should be wired to the XTAL2 and/or XTAL1
pin(s) as shown in Option 2, 3, or 4 of Figure 14.1. The type of external oscillator must be selected in the
OSCXCN register, and the frequency control bits (XFCN) must be selected appropriately (see SFR Defini-
tion 14.4).
14.3. System Clock Selection
The CLKSL bit in register CLKSEL selects which oscillator is used as the system clock. CLKSL must be
set to ‘1’ for the system clock to run from the external oscillator; however the external oscillator may still
clock peripherals (timers, PCA) when the internal oscillator is selected as the system clock. The system
clock may be switched on-the-fly between the internal and external oscillator, so long as the selected oscil-
lator is enabled and has settled. The internal oscillator requires little start-up time and may be enabled and
selected as the system clock in the same write to OSCICN. External crystals and ceramic resonators typi-
cally require a start-up time before they are settled and ready for use as the system clock. The Crystal
Valid Flag (XTLVLD in register OSCXCN) is set to ‘1’ by hardware when the external oscillator is settled. To
avoid reading a false XTLVLD in crystal mode, software should delay at least 1 ms between enabling the
external oscillator and checking XTLVLD. RC and C modes typically require no startup time.
SFR Definition 14.3. CLKSEL: Oscillator Clock Selection
Table 14.1. Internal Oscillator Electrical Characteristics
–40 to +85 °C unless otherwise specified.
Parameter Conditions Min Typ Max Units
Calibrated Internal Oscillator
Frequency
24 24.5 25 MHz
Internal Oscillator Supply Current
(fro
m
V
DD
)
OSCICN.7 = 1
—450— µA
External Clock Frequency
0—30MHz
T
XCH
(External Clock High Time)
15 ns
T
XCL
(External Clock Low Time)
15 ns
Bits7-1: Reserved.
Bit0: CLKSL: System Clock Source Select Bit.
0: SYSCLK derived from the Internal Oscillator, and scaled as per the IFCN bits in OSCICN.
1: SYSCLK derived from the External Oscillator circuit.
R R R R R R R R/W Reset Value
-------CLKSL00000000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
SFR Address:
SFR Page:
0x97
F
C8051F040/1/2/3/4/5/6/7
176 Rev. 1.5
SFR Definition 14.4. OSCXCN: External Oscillator Control
Bit7: XTLVLD: Crystal Oscillator Valid Flag.
(Read only when XOSCMD = 11x.)
0: Crystal Oscillator is unused or not yet stable.
1: Crystal Oscillator is running and stable.
Bits6-4: XOSCMD2-0: External Oscillator Mode Bits.
00x: External Oscillator circuit off.
010: External CMOS Clock Mode (External CMOS Clock input on XTAL1 pin).
011: External CMOS Clock Mode with divide by 2 stage (External CMOS Clock input on
XTAL1 pin).
10x: RC/C Oscillator Mode with divide by 2 stage.
110: Crystal Oscillator Mode.
111: Crystal Oscillator Mode with divide by 2 stage.
Bit3: RESERVED. Read = 0, Write = don't care.
Bits2-0: XFCN2-0: External Oscillator Frequency Control Bits.
000-111: see table below:
CRYSTAL MODE (Circuit from Figure 14.1, Option 1; XOSCMD = 11x)
Choose XFCN value to match crystal frequency.
RC MODE (Circuit from Figure 14.1, Option 2; XOSCMD = 10x)
Choose XFCN value to match frequency range:
f = 1.23(10
3
) / (R x C), where
f = frequency of oscillation in MHz
C = capacitor value in pF
R = Pullup resistor value in k
C MODE (Circuit from Figure 14.1, Option 3; XOSCMD = 10x)
Choose K Factor (KF) for the oscillation frequency desired:
f = KF / (C x V
DD
), where
f = frequency of oscillation in MHz
C = capacitor value on XTAL1, XTAL2 pins in pF
V
DD
= Power Supply on MCU in volts
R R/W R/W R/W R R/W R/W R/W Reset Value
XTLVLD XOSCMD2 XOSCMD1 XOSCMD0 - XFCN2 XFCN1 XFCN0 00000000
Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
SFR Address:
SFR Page:
0x8C
F
XFCN Crystal (XOSCMD = 11x) RC (XOSCMD = 10x) C (XOSCMD = 10x)
000 f 32 kHz f 25 kHz K Factor = 0.87
001 32 kHz f 84 kHz 25 kHz f 50 kHz K Factor = 2.6
010 84 kHz f 225 kHz 50 kHz f 100 kHz K Factor = 7.7
011 225 kHz f 590 kHz 100 kHz f 200 kHz K Factor = 22
100 590 kHz f 1.5 MHz 200 kHz f 400 kHz K Factor = 65
101 1.5 MHz f 4 MHz 400 kHz f 800 kHz K Factor = 180
110 4 MHz f 10 MHz 800 kHz f 1.6 MHz K Factor = 664
111 10 MHz f 30 MHz 1.6 MHz f 3.2 MHz K Factor = 1590
C8051F040/1/2/3/4/5/6/7
Rev. 1.5 177
14.4. External Crystal Example
If a crystal or ceramic resonator is used as an external oscillator source for the MCU, the circuit should be
configured as shown in Figure 14.1, Option 1. The External Oscillator Frequency Control value (XFCN)
should be chosen from the Crystal column of the table in SFR Definition 14.4 (OSCXCN register). For
example, an 11.0592 MHz crystal requires an XFCN setting of 111b.
When the crystal oscillator is enabled, the oscillator amplitude detection circuit requires a settle time to
achieve proper bias. Introducing a delay of at least 1 ms between enabling the oscillator and checking the
XTLVLD bit will prevent a premature switch to the external oscillator as the system clock. Switching to the
external oscillator before the crystal oscillator has stabilized can result in unpredictable behavior. The rec-
ommended procedure is:
Step 1. Enable the external oscillator in crystal oscillator mode.
Step 2. Wait at least 1 ms.
Step 3. Poll for XTLVLD => '1'.
Step 4. Switch the system clock to the external oscillator.
Note: T
uning-fork crystals may require additional settling time before XTLVLD returns a valid result.
The capacitors shown in the external crystal configuration provide the load capacitance required by the
crystal for correct oscillation. These capacitors are "in series" as seen by the crystal and "in parallel" with
the stray capacitance of the XTAL1 and XTAL2 pins.
Note: The load capacitance depends upon the crystal and the manufacturer. Please refer to the crystal
data sheet when completing these calculations.
For example, a tuning-fork crystal of 32.768 kHz with a recommended load capacitance of 12.5 pF should
use the configuration shown in Figure 14.1, Option 1. The total value of the capacitors and the stray capac-
itance of the XTAL pins should equal 25 pF. With a stray capacitance of 3 pF per pin, the 22 pF capacitors
yield an equivalent capacitance of 12.5 pF across the crystal, as shown in Figure 14.2.
Figure 14.2. 32.768 kHz External Crystal Example
Important Note on External Crystals: Crystal oscillator circuits are quite sensitive to PCB layout. The
crystal should be placed as close as possible to the XTAL pins on the device. The traces should be as
short as possible and shielded with ground plane from any other traces which could introduce noise or
interference.
22 pF
22 pF
32.768 kHz
XTAL1
XTAL2
10 M
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